STM32G031J6M6TR vs STM32G041J6M6 Comparación

Comparación detallada lado a lado de STM32G031J6M6TR por STMicroelectronics y STM32G041J6M6 por STMicroelectronics. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.

STMicroelectronics
STM32G041J6M6 STM32G041J6M6 - 64MHz 32-bit MCU | STMicroelectronics

STM32G041J6M6 - 64MHz 32-bit MCU | STMicroelectronics

STM32G041J6M6 ✓ Activo

Comparación de especificaciones

Parámetro STM32G031J6M6TR STM32G041J6M6
Marca STMicroelectronics STMicroelectronics
Categoría Microcontrollers Microcontrollers
Estado del ciclo de vida Activo Activo
Product Type 32-bit ARM Cortex-M0+ Microcontroller 32-bit ARM Cortex-M0+ microcontroller
Processor Core Arm Cortex-M0+ —
Architecture 32-bit RISC —
Maximum CPU Frequency 64 MHz 64 MHz
Flash Memory 32 KB 32 KB
Flash Organization 32K x 8 bits —
SRAM 8 KB 8 KB
SRAM Parity Check Hardware parity check —
Operating Voltage Range 1.7 V to 3.6 V —
USART Count 2 2
Peripheral Blocks Timers, ADC, and communication interfaces —
Encapsulado 8-pin SOIC 8-pin SOIC
Tipo de montaje Surface Mount Surface mount
VREF+ Connection on Packages Without VREF+ Pin Internally connected to VDD —
VCORE Supply Internal supply for digital peripherals, SRAM, and Flash memory —
VCORE Generation Embedded linear voltage regulator —
Estado RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
REACH Status [DATA_NEEDED: REACH status] [DATA_NEEDED: REACH status]
AEC-Q100 Qualification [DATA_NEEDED: AEC-Q100 qualification status] [DATA_NEEDED: AEC-Q100 qualification status]
Supply Voltage Range — 1.7 V to 3.6 V
Processor Architecture — Arm Cortex-M0+, 32-bit RISC
ADC — 1 ADC
Cryptographic Accelerator — AES-256
Timer Resources — General-purpose timers
Communication Interfaces — USART and communication interfaces
Package Code — 8-SO
Shipping Package — Tube
Reference Connection — VREF+ internally connected to VDD on packages without a VREF+ pin
Reference Buffer — Must be kept disabled when VREF+ is internally connected to VDD
Rango de temperatura de funcionamiento — [DATA_NEEDED: operating temperature range]

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