XC2C64A-7CP56I vs XC2C64A-7CP56C Comparison
Detailed side-by-side comparison of XC2C64A-7CP56I by AMD and XC2C64A-7CP56C by AMD. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | XC2C64A-7CP56I | XC2C64A-7CP56C |
|---|---|---|
| Brand | AMD | AMD |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Device Type | CoolRunner-II complex programmable logic device | CoolRunner-II complex programmable logic device |
| Number of Macrocells | 64 macrocells | — |
| Internal Frequency | 333 MHz | 333 MHz |
| Maximum Propagation Delay | 6.7 ns | — |
| Pin-to-Pin Logic Delay | 4.6 ns | 4.6 ns |
| Stated Propagation Delay | 5 ns | — |
| User I/Os | 45 pins | — |
| Total Package Pins | 56 pins | — |
| Internal Supply Voltage | 1.7 V to 1.9 V | — |
| Quiescent Current | 15 A as stated in the verified source | 15 µA |
| Logic Technology | 0.18 micron CMOS | — |
| Programmable Type | In-system programmable | — |
| Package Type | CSP-56 | CSP-56, 6 x 6 mm, 0.50 mm pitch |
| Package Dimensions | 6 x 6 mm | — |
| Package Pitch | 0.50 mm | — |
| Logic Family | CMOS | CMOS |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| RoHS Compliance | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| REACH Compliance | [DATA_NEEDED: REACH compliance status] | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification status] | [DATA_NEEDED: AEC-Q100 status] |
| Macrocell Count | — | 64 macrocells |
| Equivalent Logic Capacity | — | 1.5K gates |
| Propagation Delay | — | 5 ns |
| User I/O Count | — | 45 I/Os |
| Process Technology | — | 0.18 µm CMOS |
| Core Supply Voltage | — | 1.8 V |
| Pin Count | — | 56 pins |
| Mounting Type | — | Chip-scale surface-mount package |