XC2C64A-7CP56I vs XC2C64A-7CP56C 对比

详细并排对比 XC2C64A-7CP56I 出自 AMD 和 XC2C64A-7CP56C 出自 AMD。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

AMD
XC2C64A-7CP56I XC2C64A-7CP56I - 64-Macrocell 333 MHz CPLD | AMD

XC2C64A-7CP56I - 64-Macrocell 333 MHz CPLD | AMD

XC2C64A-7CP56I ✓ 量产中

规格对比

参数 XC2C64A-7CP56I XC2C64A-7CP56C
品牌 AMD AMD
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 Obsolete
Device Type CoolRunner-II complex programmable logic device CoolRunner-II complex programmable logic device
Number of Macrocells 64 macrocells —
Internal Frequency 333 MHz 333 MHz
Maximum Propagation Delay 6.7 ns —
Pin-to-Pin Logic Delay 4.6 ns 4.6 ns
Stated Propagation Delay 5 ns —
User I/Os 45 pins —
Total Package Pins 56 pins —
Internal Supply Voltage 1.7 V to 1.9 V —
静态电流 15 A as stated in the verified source 15 µA
Logic Technology 0.18 micron CMOS —
Programmable Type In-system programmable —
Package Type CSP-56 CSP-56, 6 x 6 mm, 0.50 mm pitch
Package Dimensions 6 x 6 mm —
Package Pitch 0.50 mm —
Logic Family CMOS CMOS
工作温度 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
RoHS Compliance [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
REACH Compliance [DATA_NEEDED: REACH compliance status] [DATA_NEEDED: REACH status]
AEC-Q100 Qualification [DATA_NEEDED: AEC-Q100 qualification status] [DATA_NEEDED: AEC-Q100 status]
Macrocell Count — 64 macrocells
Equivalent Logic Capacity — 1.5K gates
Propagation Delay — 5 ns
User I/O Count — 45 I/Os
Process Technology — 0.18 µm CMOS
Core Supply Voltage — 1.8 V
引脚数量 — 56 pins
安装类型 — Chip-scale surface-mount package

数据手册与资源

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