XC3090L-8TQ176C vs XC3090L-7TQG176C Comparison
Detailed side-by-side comparison of XC3090L-8TQ176C by Xilinx and XC3090L-7TQG176C by Xilinx. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | XC3090L-8TQ176C | XC3090L-7TQG176C |
|---|---|---|
| Brand | Xilinx | Xilinx |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | XC3000A/L (XC3000 series) | XC3000L |
| Product Type | CMOS Field Programmable Gate Array (FPGA) | — |
| Usable Gates | 5,000 | 5,000 (typical, up to 9,000 peak) |
| Maximum Usable Gates | 6,000 | — |
| Configurable Logic Blocks (CLBs) | 320 | — |
| Logic Cells | 320 | — |
| Maximum Internal Frequency | 80 MHz | — |
| Supply Voltage (VCC) | 3.3 V | — |
| Process Technology | CMOS (SRAM configuration) | 0.8 micron CMOS |
| Configuration Memory | Internal SRAM, externally loaded | SRAM (volatile, requires external PROM) |
| Package | TQFP-176 (176-terminal PQFP) | 176-pin TQFP (TQG176), 1.4 mm height, surface-mount |
| Package Code | LFQFP / TQFP | — |
| Terminal Pitch | 0.500 mm | — |
| Terminal Form | Gull Wing | — |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature Grade | Commercial (C) | — |
| Speed Grade | 8 (slowest bin) | — |
| Boundary Scan | JTAG IEEE 1149.1-compatible | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | unknown |
| MSL Level | [DATA_NEEDED: MSL rating] | 3 (168 hours) [DATA_NEEDED: confirm per package marking] |
| Device | — | XC3090L |
| Logic Cells / CLBs | — | 100 CLBs (320 F-FFs) |
| User I/O Count | — | 144 (maximum, TQG176) |
| Supply Voltage (Core) | — | 3.0 V to 3.6 V |
| Supply Voltage (I/O VCCO) | — | 3.0 V to 3.6 V |
| Logic Cell Toggle Delay | — | approximately 1.3 to 1.5 ns (-7 speed grade) |
| Operating Temperature Range | — | 0C to +85C (C suffix, commercial) |
| Configuration Mode | — | Serial (master/slave) and JTAG (IEEE 1149.1) |
| Lead-Free / Lead Content | — | [DATA_NEEDED] |
| Configuration Clock Source | — | Internal oscillator amplifier or external pin |
| Output Drive (per I/O) | — | 8 mA source / 24 mA sink (typical, datasheet TBD by speed grade) |