Reported by 3D InCites on . Summarized and analyzed by XAIPART Editorial.
What happened
Rapidus Corporation announced the creation of the Rapidus Collaborative Open Rapid Ecosystem (CORE), described as a global ecosystem framework intended to support the development and mass production of cutting-edge semiconductors.S1 The framework is positioned to integrate the full semiconductor value chain — research institutions, EDA, IP, design, and manufacturing — into a single customer-facing infrastructure.S1
As the first initiative under CORE, Rapidus is forming Design Solution Associates, a group of design companies intended to bridge customers and Rapidus with design resources and specialized expertise aimed at the company's advanced 2nm semiconductor foundry.S1 The 17 announced members, listed alphabetically, are AION Silicon Limited; Cadence Design Systems, Inc.; Dai Nippon Printing Co., Ltd.; GreatAsic Technology Sdn. Bhd.; HCL Technologies Limited; Infinecs Systems Sdn. Bhd.; Infosys Limited; MavissDesign Co., Ltd.; MosChip Technologies Limited; NSW Inc.; Oppstar Technology Sdn Bhd; Quest Global Services Pte. Ltd.; SkyeChip Berhad; Synopsys, Inc.; TOPPAN Inc.; Toshiba Information Systems (Japan) Corporation; and Wipro Limited.S1
Rapidus stated that Design Solution Associates will support customers both in Japan and overseas, and that CORE will expand beyond design into EDA, IP, and other categories over time.S1 The source did not disclose funding, design-tapeout commitments, or project timelines tied to the framework.
| Metric | Reported value | Source |
|---|---|---|
| CORE partner count (Phase 1, design) | 17 | S1 |
| Foundry node targeted | 2nm | S1 |
| EDA tool vendors in group | Cadence, Synopsys | S1 |
| Investment, design capacity, timeline | Not disclosed | S1 |
Background timeline
XAIPART take
Technical impact
XAIPART analysis: Pairing Cadence and Synopsys with seven Asia-Pacific design service firms (GreatAsic, Infinecs, MavissDesign, Oppstar, SkyeChip, AION, Dai Nippon Printing, TOPPAN, and NSW) gives Rapidus a practical path to PDK enablement and tape-out assistance for 2nm, where ecosystem maturity — not just wafer yield — gates customer adoption. XAIPART analysis
Market impact
XAIPART analysis: For procurement teams evaluating 2nm sourcing optionality beyond TSMC, the Rapidus CORE roster is the first public signal that a multi-vendor, Japan-anchored 2nm design chain is taking shape, though the source disclosed no wafer allocation, pricing, or volume figures for the 2nm foundry. XAIPART analysis
Action
XAIPART analysis: Buyers and design-in engineers should map each Design Solution Associate against their current EDA flow (Cadence vs. Synopsys) and physical-design partners to identify which firms can sign off a 2nm block at Rapidus, since the source did not disclose each member's service scope. XAIPART analysis
XAIPART Forecast
XAIPART analysis: XAIPART expects that, if Rapidus expands CORE to name an additional IP-vendor cohort within 9 months from publication, the named IP suppliers will include at least one established processor-IP house, since broadening beyond design and EDA into IP is the stated next step in the framework. XAIPART analysis
Facts are as reported by the cited source. The design-in, sourcing and forward-looking statements above are XAIPART's analysis, not the source's claims. Uncertainty: the source did not disclose design-tapeout capacity, customer commitments, or wafer-start allocation tied to Rapidus CORE, and partner scope beyond the 17 named firms is not described.
Corrections: none at publication. This brief will be updated with a timestamp if the source corrects its report.
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|---|---|---|---|---|
| Input cost | PCOPPUSDM, PALUMUSDM, PNICKUSDM | USD/mt | 52 d | |
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So wurde dies erstellt
Prozessnachweise – Abruf, Quellenprüfung, Modell und Gate
| Source fetched | 3D InCites · www.3dincites.com · 4,285 chars · fetch status success |
|---|---|
| Source sanity (S1) | ok — passed before any model call (no s1_ block recorded) |
| Model / prompt | MiniMax-M3 · prompt Blog Agent - News Summary (v2.8-final) · 6,595 tokens · 20.9s · run completed |
| Gate | verdict hold · 5/6 applicable checks passed · spec v2.9 · C10 ratio 0.116998 · C10 rounds 0 |
| Time contract | 4 <time datetime> values in this brief — 0 violations (+08:00 or date-only) |
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