Produkte (32773)

PIC32MX130F064BT-I/SS - 40MHz 32-bit MCU, 64KB Flash | Microchip
PIC32MX130F064BT-I/SS

PIC32MX130F064BT-I/SS - 40MHz 32-bit MCU, 64KB Flash | Microchip

The Microchip Technology PIC32MX130F064BT-I/SS is a 32-bit MIPS32 M4K RISC microcontroller running at 40 MHz, integrating 64 KB of Flash and 16 KB of SRAM in a 28-pin SSOP package. It is part of the PIC32MX1XX/2XX family of low-power 32-bit MCUs aimed at audio, graphics, USB, and advanced analog applications. With Peripheral Pin Select (PPS), parallel master port (PMP), two I2S/SPI modules, and a 1 ns high-resolution timer, the device bridges cost-sensitive 8/16-bit designs and high-performance 32-bit processing. A microcontroller (MCU) is a single-chip computer that integrates a CPU core, program memory (Flash), data memory (SRAM), and peripherals on one die. The PIC32MX130 family sits in the hierarchy: microcontroller -> embedded processor -> 32-bit MCU -> MIPS RISC core -> PIC32 family. It targets designs that need deterministic real-time control plus the bandwidth of a 32-bit instruction set, while staying within tight power and cost envelopes. Key differentiating features of the PIC32MX130F064BT-I/SS include its 21 general-purpose I/O pins, 5 sixteen-bit timers (plus two additional 16-bit timers), up to 5 PWM channels, a 10-bit 1 Msps analog-to-digital converter with up to 13 input channels, and a Charge Time Measurement Unit (CTMU) that supports mTouch capacitive-touch buttons and sliders. It also provides a parallel master port for graphics interfaces, an on-chip temperature sensor, and supply-voltage operation from 2.3 V to 3.6 V with sub-0.5 mA/MHz active current. Architecturally, the M4K core implements the MIPS32 instruction set with single-cycle multiply, hardware divide assist, and a five-stage pipeline. Flash is prefetched through a 16-word cache, which lets the CPU approach 40 MHz effective throughput even on Flash-resident code. PPS allows most digital peripherals to be remapped to almost any I/O pin, decoupling PCB layout from firmware decisions - a major advantage for compact boards. Typical applications include consumer audio peripherals (codecs, MIDI, DSP front-ends), low-cost graphics HMI with PMP-driven LCDs, USB HID/CID devices, capacitive-touch user interfaces, and industrial sensor hubs where the CTMU and 1 ns timer enable precision measurement. The wide 2.3 V-3.6 V supply range also supports battery-powered IoT nodes running from a single Li-ion cell. When laying out this MCU, route the 2.3-3.6 V decoupling network close to VDD/VSS pairs and reserve a clean ground pour under the SSOP body. The -I grade supports industrial -40C to +85C operation; choose the -V grade if the design must survive -40C to +105C. This page synthesizes distributor pricing, drop-in alternatives drawn from the same PIC32MX1XX family, and practical design notes that go beyond what is found in the manufacturer datasheet alone.

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PIC32MX130F064BT-V/ML - 32-bit MCU 64KB Flash 40MHz | Microchip
PIC32MX130F064BT-V/ML

PIC32MX130F064BT-V/ML - 32-bit MCU 64KB Flash 40MHz | Microchip

The Microchip Technology PIC32MX130F064BT-V/ML is an automotive-grade 32-bit MIPS32 M4K RISC microcontroller integrating 64KB Flash and 16KB SRAM with a 40MHz core, packaged in a 28-pin QFN (6x6 mm) with exposed pad. It operates from 2.3V to 3.6V across an extended -40C to +105C automotive temperature range and is AEC-Q100 qualified, making it suitable for harsh-environment automotive and industrial designs. A 32-bit microcontroller (MCU) is a single-chip computer that integrates a CPU core, program memory (Flash), data memory (SRAM), and peripherals such as timers, communication interfaces, and analog blocks. The PIC32MX1XX/2XX family sits within Microchip's broader PIC32MX microcontroller portfolio, positioned between the PIC24 16-bit MCUs and the higher-performance PIC32MZ/MK families. The M4K core executes most instructions in one clock cycle, giving benchmark-class integer performance at moderate clock rates and very low power consumption under 0.5 mA/MHz typical. Key features include two I2S/SPI modules for audio codec and serial communication, Peripheral Pin Select (PPS) for flexible signal routing, a Parallel Master Port (PMP) for graphics interfaces, and a Charge Time Measurement Unit (CTMU) supporting mTouch capacitive touch buttons and sliders with 1 ns time-measurement resolution. The on-chip 10-bit ADC and integrated temperature sensor reduce external BOM, while five 16-bit general-purpose timers plus a 5V-tolerant I/O structure simplify mixed-voltage system design. Architecturally, the device uses a Harvard-style bus with separate Flash and SRAM paths and hardware multiply/divide for deterministic interrupt response. The 40 MHz core, combined with the 5-stage pipeline, delivers roughly 1.56 DMIPS/MHz efficiency, allowing DSP-style audio processing and protocol stacks to run on a single chip. The exposed thermal pad on the 28-QFN package is essential for dissipation at the 105C automotive ceiling. Typical applications include automotive body electronics and HMI modules, low-cost audio peripherals with I2S codecs, capacitive touch human-machine interfaces using mTouch, industrial sensor nodes with serial interfaces, and consumer devices that need USB or graphics via PMP. The combination of low power, deterministic interrupt latency, and AEC-Q100 qualification broadens deployment into safety-relevant subsystems. When designing with this MCU, allocate a continuous copper pour under the exposed pad to keep junction temperature within the -40C to +105C range, and follow Microchip's recommended 8 MHz external crystal plus PLL configuration for full 40 MHz operation. Use the PPS feature to remap peripherals and avoid pinout conflicts across the PIC32MX1XX/2XX family. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

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PIC32MX130F064BT-V/SO - 40MHz 32-bit MCU, 64KB Flash, 28-SOIC
PIC32MX130F064BT-V/SO

PIC32MX130F064BT-V/SO - 40MHz 32-bit MCU, 64KB Flash, 28-SOIC

The Microchip Technology PIC32MX130F064BT-V/SO is a 32-bit MIPS32 M4K RISC microcontroller running at 40 MHz with 64 KB Flash and 16 KB RAM, housed in a 28-pin SOIC package and qualified to AEC-Q100 for automotive applications. The part operates from 2.3V to 3.6V, with up to 21 general-purpose I/O pins, and consumes less than 0.5 mA/MHz under typical conditions across an industrial/automotive temperature range of -40C to +105C. The "T" suffix indicates Tape and Reel packaging, while the "V" suffix designates the automotive temperature grade. A microcontroller (MCU) is a single-chip computer that integrates a CPU core, program memory (Flash), working memory (SRAM), and a rich set of peripherals into one IC. The PIC32MX1xx/2xx family sits in the 32-bit microcontroller hierarchy as: 32-bit MCU -> MIPS M4K core -> PIC32MX family -> Microchip 8/16/32-bit portfolio -> embedded microcontrollers. Compared with 8-bit/16-bit MCUs, 32-bit devices provide higher computational throughput, larger address space, and richer peripherals for connected, graphical, and audio products. Key features of the PIC32MX130F064BT-V/SO include the MIPS32 M4K core with single-cycle multiply, Peripheral Pin Select (PPS) for flexible I/O mapping, two I2S/SPI modules for codec and serial communications, a Parallel Master Port (PMP) for graphics interfaces, Charge Time Measurement Unit (CTMU) supporting mTouch capacitive touch buttons and sliders, 1 ns high-resolution time measurement, on-chip temperature measurement, and 5 general-purpose 16-bit timers plus 2 input capture modules. These features are typically not all available simultaneously on competing 32-bit MCUs at this price point. The PIC32MX130F064BT-V/SO is intended for cost-sensitive 32-bit applications in automotive body electronics, consumer audio, low-cost graphical HMIs, and industrial control. Its PPS remapping, PMP interface, and dual I2S peripherals make it well suited for small color TFT displays with audio playback, while its AEC-Q100 grade and wide temperature range fit under-hood and cabin automotive ECUs.

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PIC32MX130F064BT-V/SS - 40MHz 32-bit MCU, 64KB Flash | Microchip
PIC32MX130F064BT-V/SS

PIC32MX130F064BT-V/SS - 40MHz 32-bit MCU, 64KB Flash | Microchip

The Microchip Technology PIC32MX130F064BT-V/SS is a 32-bit MIPS32 M4K microcontroller operating at up to 40 MHz with 64 KB of Flash program memory and 16 KB of SRAM, housed in a 28-pin SSOP (SS) package. The part suffix -V denotes the automotive grade (AEC-Q100) qualification, while the -T suffix denotes Tape-and-Reel packaging. It delivers core current consumption below 0.5 mA/MHz for power-sensitive designs. A 32-bit microcontroller (MCU) is an integrated circuit that contains a 32-bit processor core, program memory (Flash), data memory (SRAM), and a rich set of on-chip peripherals. Within the broader PIC32MX1XX/2XX 28/36/44-pin family, the PIC32MX130 sits at the entry of the performance tier, sharing its MIPS M4K core with the PIC32MX1xx line but offering less Flash and SRAM than PIC32MX2xx devices. The part hierarchy is: microcontroller -> 32-bit MCU -> embedded processor -> semiconductor. This taxonomy matters because PIC32MX MCUs target graphics, audio, USB, and advanced analog interfaces in cost-sensitive embedded applications. Key features include 64 KB Flash, 16 KB SRAM, two I2S/SPI modules for codec and serial communications, Peripheral Pin Select (PPS) for flexible pin mapping, a Parallel Master Port (PMP) for graphics interfaces, mTouch capacitive touch support, 1 ns high-resolution time measurement via the Charge Time Measurement Unit (CTMU), and on-chip temperature measurement capability. It supports 21 I/O ports with multiple 16-bit timers and a 10-bit ADC. The PIC32MX130 uses a 5-stage pipeline MIPS32 M4K core capable of 1.56 DMIPS/MHz, providing deterministic real-time response for industrial and consumer applications. Operating from 2.3V to 3.6V, it is fully compatible with 3.3V system buses. The 28-SSOP package offers a small footprint suitable for compact consumer electronics, sensors, and HMI panels. Typical applications include consumer audio devices, capacitive touch user interfaces, low-cost graphics terminals, sensor hubs, and automotive body controllers (where the -V grade is required). The 64 KB Flash and 16 KB SRAM balance code density and buffer space for small RTOS or bare-metal implementations. When designing with this part, note that the -V grade supports the full -40C to +105C automotive temperature range. The SSOP package has limited thermal dissipation; derate clock speed when ambient temperature exceeds 85C. PPS remapping must be configured before peripheral enable to avoid glitches. This page synthesizes distributor pricing, slot-in alternatives, and practical design notes not found in the manufacturer datasheet.

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PIC32MX130F064C-I/TL - 32-bit MCU, 64KB Flash, 40MHz, 36-VTLA | Microchip
PIC32MX130F064C-I/TL

PIC32MX130F064C-I/TL - 32-bit MCU, 64KB Flash, 40MHz, 36-VTLA | Microchip

The Microchip Technology PIC32MX130F064C-I/TL is a 32-bit MIPS32 M4K microcontroller running at 40 MHz, with 64 KB Flash and 16 KB SRAM, housed in a 36-pin VTLA (5x5 mm) package with exposed pad. The "-I" temperature grade indicates an industrial -40C to +85C operating range, and the /TL suffix denotes the VTLA-36 (5x5 mm) tape-and-reel package. A 32-bit microcontroller (MCU) is an integrated circuit containing a CPU core, program memory, working RAM, and a rich set of on-chip peripherals such as timers, communication interfaces, and analog blocks. The PIC32 family sits within Microchip's MCU hierarchy: PIC32MX > MIPS M4K core > 32-bit microcontrollers > microcontrollers > integrated circuits. The 32-bit datapath enables higher throughput than 8-bit PIC MCUs and supports larger C-code workloads, while Peripheral Pin Select (PPS) provides flexible remapping of digital peripherals to physical pins. Key features of the PIC32MX130F064C-I/TL include 64 KB (64K x 8) Flash, 16 KB SRAM, 21 general-purpose I/O pins, USB 2.0 full-speed device/host/OTG, two UARTs, two I2C and two SPI modules, a 10-bit 1 Msps ADC with up to 28 analog channels, four 16-bit timers/captures, a Real-Time Clock/Calendar (RTCC), a Charge Time Measurement Unit (CTMU) for capacitive touch, and a separate PLL for USB operation. The MIPS M4K core executes most instructions in a single cycle, achieving 1.56 DMIPS/MHz. Architecturally, the device uses a 5-stage pipeline MIPS32 M4K processor, internal bus matrix, dual-banked flash prefetch, and dual-banked SRAM to remove pipeline stalls. The integrated 8 MHz internal RC oscillator can be combined with the on-chip PLL to generate the 40 MHz system clock, while a second PLL is dedicated to the 48 MHz USB clock domain. PPS allows most digital peripherals to be mapped onto a wide choice of I/O pads for easier PCB routing. Typical applications include USB HID peripherals, capacitive-touch human-machine interfaces, low-cost graphics and audio control panels, sensor hubs, and general-purpose embedded control in industrial and consumer products. The 36-pin VTLA footprint is one of the smaller PIC32 packages, making the part suitable for space-constrained designs. When designing with this device, ensure the VTLA-36 exposed pad is soldered to a sufficient copper pour to meet the 38 C/W theta_JA thermal envelope. Decouple VDD with a 0.1 uF and a bulk capacitor placed within a few millimeters of the supply pins, and follow Microchip's IBIS models for signal-integrity simulation of USB lines. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.

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PIC32MX130F064C-V/TL - 64KB Flash 32-bit MCU 40MHz | Microchip
PIC32MX130F064C-V/TL

PIC32MX130F064C-V/TL - 64KB Flash 32-bit MCU 40MHz | Microchip

The Microchip Technology PIC32MX130F064C-V/TL is a 32-bit RISC microcontroller built on the MIPS32 M4K core, delivering 64 KB Flash program memory, 16 KB SRAM, and a maximum CPU clock of 40 MHz in a 36-pin VTLA (6x6 mm, exposed-pad HVQCCN) package. The -V suffix indicates the extended -40C to +105C industrial temperature grade, and the /TL suffix indicates tape-and-reel packaging on the 36-terminal VTLA. A microcontroller (MCU) is a single-chip computer that integrates a CPU core, non-volatile program memory (Flash), volatile data memory (SRAM), and a rich set of peripherals such as timers, communication controllers, ADCs, and I/O pins. Within the broader taxonomy of semiconductors, MCUs sit below microprocessors (which require external memory) and above simple logic ICs. The PIC32 family is Microchip's 32-bit extension of the well-known PIC architecture, targeting applications that outgrow 8-bit PIC16/PIC18 or 16-bit PIC24/dsPIC parts but still benefit from Microchip's MPLAB X toolchain and peripheral library ecosystem. Key features include 21 general-purpose I/O pins with Peripheral Pin Select (PPS), dual UART, dual SPI, dual I2C, dual I2S interfaces, a 10-channel 10-bit ADC, a Real-Time Clock and Calendar (RTCC), a Charge Time Measurement Unit (CTMU) for capacitive touch, and a separate PLL for the USB 2.0 full-speed controller. The device operates from 2.3V to 3.6V and supports in-circuit and in-application programming via 4-wire JTAG. Architecturally, the PIC32MX130 uses a 5-stage pipeline MIPS32 M4K core with hardware multiply/divide and a single-cycle Flash fetch system that lets most instructions execute in one cycle. The MIPS ISA offers higher code density than ARM Cortex-M for similar workloads, and Microchip's Harmony and MPLAB XC32 toolchains support C/C++ development. The CTMU and PPS subsystems make the part flexible for mixed-signal and pin-constrained designs. Typical applications include industrial automation controllers, automotive body and infotainment subsystems, USB peripherals, consumer appliances with capacitive touch, IoT sensor hubs, and medical monitoring devices. The wide 2.3V to 3.6V supply range and 21 I/O pins are particularly attractive for sensor-rich nodes. When designing with this part, evaluate whether the 50 MHz -50V speed grade (PIC32MX130F064C-50V/TL) is needed - it shares the same die and pinout but offers 25% more CPU headroom. Also plan for the exposed-pad requirement: the EP must be soldered to a properly sized copper pad for thermal and electrical grounding. This page synthesizes Microchip datasheet specifications, distributor pricing as of 2026-10-01, drop-in pin-compatible alternatives, and practical design notes that go beyond the datasheet's typical-application section.

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PIC32MX130F064CT-I/TL - 32-bit MCU, 64KB Flash, 40MHz | Microchip
PIC32MX130F064CT-I/TL

PIC32MX130F064CT-I/TL - 32-bit MCU, 64KB Flash, 40MHz | Microchip

The Microchip Technology PIC32MX130F064CT-I/TL is a 32-bit MIPS32 M4K microcontroller operating at up to 40 MHz with 64 KB Flash and 16 KB RAM, housed in a 36-pin VTLA (5x5 mm) package with exposed pad. It belongs to the PIC32MX1xx/2xx general-purpose family and provides 21 general-purpose I/O lines with Peripheral Pin Select (PPS) remapping for flexible signal routing. A microcontroller (MCU) is an integrated circuit that combines a CPU core, program memory, working RAM, and programmable peripherals into a single chip. Within the semiconductor taxonomy, the PIC32MX130F064CT sits in the hierarchy: microcontroller -> 32-bit MCU -> MIPS M4K core -> Microchip PIC32MX family -> power management and embedded control IC. MIPS M4K cores support the MIPS16e instruction set, delivering up to 40 percent smaller code size for the same functionality compared with full 32-bit instructions, which is critical for fitting application code into the 64 KB Flash. Key features include a 12-bit 10-channel Analog-to-Digital Converter (ADC), two UART modules with IrDA and LINbus support, two I2C and two SPI peripherals, a Parallel Master Port (PMP), four channels of hardware DMA with automatic data size detection, an I2S interface, PWM outputs, plus WDT, Power-on Reset (POR), and Brown-out Reset. The CT suffix indicates tape-and-reel delivery and the I suffix denotes an industrial temperature grade (-40C to +85C). Typical applications include consumer appliances, industrial control nodes, USB-to-UART converters, low-cost graphics HMIs using PMP, sensor fusion hubs, and general-purpose 32-bit embedded controllers where footprint and BOM cost drive architecture selection. Compared with 8-bit PIC16/PIC18 parts the PIC32MX130 brings deterministic 32-bit performance at near-8-bit pricing; compared with Cortex-M0+ parts it offers a different toolchain (MPLAB X IDE, XC32 compiler). When designing with this part, place the 36-pin VTLA exposed pad on a thermal pad with multiple vias to the inner ground plane. Decouple VDD with a 100 nF ceramic as close as possible to each pin pair. Use PPS to remap peripheral functions and avoid pin-out conflicts in multi-peripheral designs. As of 2026-10-01, the PIC32MX130F064CT-I/TL is active in production and available through authorized Microchip distributors. This page synthesizes Microchip datasheet specifications, distributor stock and pricing, drop-in alternatives, and practical design notes not consolidated on the manufacturer datasheet alone.

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PIC32MX130F064D-I/ML - 40MHz 32-bit MCU 64KB Flash 44-QFN
PIC32MX130F064D-I/ML

PIC32MX130F064D-I/ML - 40MHz 32-bit MCU 64KB Flash 44-QFN

The Microchip Technology PIC32MX130F064D-I/ML is a 32-bit RISC microcontroller built on the MIPS32 M4K core, running up to 40 MHz with 64 KB Flash and 16 KB SRAM in a 44-pin QFN (8x8 mm) package. It operates from 2.3 V to 3.6 V and delivers less than 0.5 mA/MHz active current, making it suitable for cost-sensitive, low-power embedded designs. A microcontroller (MCU) is a single-chip computer that integrates a CPU core, program memory (Flash), data memory (SRAM), and a rich set of peripherals. The PIC32MX1XX/2XX family sits in Microchip's PIC32 hierarchy: PIC32MX -> MIPS M4K 32-bit MCU -> low-power general-purpose microcontroller -> embedded system on chip. Compared with 8-bit PIC16/PIC18 MCUs, the PIC32MX brings 32-bit datapath performance, DMA, and USB at low cost, while compared with Cortex-M3/M4 it offers Microchip's MPLAB Harmony ecosystem and mTouch capacitive-touch support. Key features of this variant include two I2S/SPI modules for audio codecs, Peripheral Pin Select (PPS) for flexible I/O mapping, a Parallel Master Port (PMP) for graphics interfaces, mTouch capacitive touch hardware, a 1 ns high-resolution 16-bit timer, an on-chip temperature sensor, and a 10-bit 1 Msps ADC with up to 13 channels. The PPS feature is a major differentiator: it allows digital peripherals to be remapped to most I/O pins at runtime, simplifying PCB layout and BOM. The architecture uses a 5-stage pipelined MIPS32 M4K core with single-cycle hardware multiply, a Prefetch Cache Controller (PFM) for Flash acceleration, and a separate bus for peripherals. The DMA controller offloads data movement between peripherals and memory, while the PMP provides an 8-bit or 16-bit parallel interface for graphics LCDs, SRAM, or FPGA data transfer. Typical applications include consumer audio devices, USB HID peripherals, low-cost graphics HMI with PMP-driven LCDs, capacitive touch user interfaces using mTouch, IoT sensor nodes, and industrial control boards. The combination of USB, I2S, PMP, and mTouch in a 44-pin QFN is unusual at this price tier. When designing with this part, note that the 44-QFN package uses an exposed thermal pad (EP) that must be soldered to a ground copper pour for electrical and thermal performance. The PPS registers must be unlocked and locked after configuration to prevent runaway writes. Programming is supported by MPLAB X IDE, XC32 compiler, and SEGGER J-Link tools. This page synthesizes distributor pricing, drop-in alternatives within the PIC32MX1XX family, and practical design notes not consolidated in the manufacturer datasheet.

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PIC32MX130F064D-I/TL - 40MHz MIPS32 M4K MCU 64KB Flash | Microchip
PIC32MX130F064D-I/TL

PIC32MX130F064D-I/TL - 40MHz MIPS32 M4K MCU 64KB Flash | Microchip

The Microchip Technology PIC32MX130F064D-I/TL is a 32-bit RISC microcontroller built on the MIPS32 M4K core, delivering up to 40 MHz of CPU performance with under 0.5 mA/MHz active current consumption. It integrates 64 KB of Flash program memory and 16 KB of SRAM in a 44-pin VTLA (6x6 mm, 0.65 mm pitch) surface-mount package, with 21 general-purpose I/O lines and a 2.3 V to 3.6 V supply range. A 32-bit microcontroller (MCU) is a single-chip computer that integrates a 32-bit CPU core, program memory (Flash), data memory (SRAM), and a configurable set of peripherals (timers, ADC, communication interfaces). Within the broader taxonomy, a PIC32MX MCU sits in the hierarchy: PIC32MX -> PIC32 family -> MIPS32 architecture -> 32-bit MCU -> microcontroller -> embedded processor -> semiconductor. Microchip PIC32MX parts target low-power, mixed-signal embedded designs that need more compute headroom than 8/16-bit MCUs without jumping to Cortex-M4. Key features of the PIC32MX130F064D include two I2S/SPI modules for codec and audio interfaces, a Parallel Master Port (PMP) for graphics, Peripheral Pin Select (PPS) for flexible signal routing, mTouch capacitive-touch support, a Charge Time Measurement Unit (CTMU) for high-resolution (1 ns) time measurement, on-chip temperature sensing, and a Real-Time Clock and Calendar (RTCC). The CTMU plus mTouch combination is distinctive to PIC32MX1xx/2xx parts and enables cost-effective touch and capacitive sensing. Typical applications include low-cost audio peripherals, graphics interfaces, capacitive-touch user interfaces, USB device classes, sensor hubs, industrial HMI panels, and low-power consumer devices. With 64 KB Flash it comfortably fits USB stacks plus an RTOS or firmware framework. Design consideration: the VTLA (6x6 mm) package is small but does not have an exposed pad for thermal dissipation; route power/ground generously and follow Microchip's recommended decoupling (100 nF + 1 uF close to VDD/VSS). For higher-pin-count migration within the family, consider the PIC32MX150/170/1xx/2xx 64-pin variants.

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PIC32MX130F064D-V/ML - 32-bit MCU, 64KB Flash, 40MHz | Microchip
PIC32MX130F064D-V/ML

PIC32MX130F064D-V/ML - 32-bit MCU, 64KB Flash, 40MHz | Microchip

The Microchip PIC32MX130F064D-V/ML is a 32-bit MIPS M4K microcontroller operating up to 40 MHz with 64 KB Flash and 16 KB SRAM, packaged in a 44-pin QFN (8x8) and qualified for the -40C to +105C industrial temperature range. It delivers less than 0.5 mA/MHz active current consumption, integrates two I2S/SPI modules for codec and serial communications, supports Peripheral Pin Select (PPS) for flexible pin mapping, and includes a Parallel Master Port (PMP) for graphics interfaces. What is a PIC32MX microcontroller? PIC32MX is Microchip's family of 32-bit RISC microcontrollers built on the MIPS M4K core, positioned between 16-bit PIC24/dsPIC devices and higher-end Cortex-M3/M4 parts. They run at up to 50-70 MHz, expose USB and CAN peripherals, and target cost-sensitive embedded applications. Within this taxonomy, the PIC32MX130 sub-family provides entry-level 32-bit performance with audio/I2S and graphics PMP capability - a sweet spot for HMI, audio accessories, and USB peripherals. Key features of the PIC32MX130F064D-V/ML include 64 KB Flash program memory, 16 KB SRAM data memory, 21 general-purpose I/O pins, hardware DMA with automatic data size detection, five 16-bit timers plus two 32-bit timers, a 10-bit ADC, mTouch capacitive touch support, and on-chip temperature measurement. The -V/ML suffix denotes the +105C V-temp grade in a QFN-44 (8x8) package. Architecturally, the PIC32MX130F064D uses the MIPS M4K 32-bit RISC core with single-cycle multiply, hardware divide, and separate PLLs for the CPU and USB clock domains. The dual-PLL design allows the USB peripheral to run at the precise 48 MHz required by USB Full-Speed while the CPU runs at up to 40 MHz for application code - decoupling peripheral timing from core performance. Typical applications for the PIC32MX130F064D-V/ML include USB audio devices, low-cost graphics HMI panels with PMP-connected LCDs, capacitive-touch user interfaces, industrial sensors with USB connectivity, and consumer audio streaming accessories. The combination of I2S, USB, and PMP in a single QFN-44 device enables compact BOMs. When designing with this device, allocate sufficient decoupling capacitance near the VDD/AVDD pins (typically 0.1 uF ceramic per pin pair plus a bulk 10 uF), and use the PPS feature to remap peripherals away from default pins to ease PCB routing. For USB applications, the on-chip transceiver requires an external 48 MHz crystal with the correct load capacitors per the PIC32 USB hardware design checklist. This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design notes that complement the manufacturer datasheet without duplicating it.

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PIC32MX130F064D-V/PT - 40MHz 32-bit MCU 64KB Flash | Microchip
PIC32MX130F064D-V/PT

PIC32MX130F064D-V/PT - 40MHz 32-bit MCU 64KB Flash | Microchip

The Microchip Technology PIC32MX130F064D-V/PT is a 32-bit MIPS M4K microcontroller with 64 KB Flash and 16 KB RAM, running up to 40 MHz, packaged in a 44-pin TQFP (10x10 mm). It features two I2S/SPI modules, Peripheral Pin Select (PPS), Parallel Master Port (PMP), mTouch capacitive touch support, and on-chip temperature measurement, with an operating voltage range of 2.3 V to 3.6 V. The 40 MHz core consumes less than 0.5 mA/MHz active, balancing performance with energy efficiency for embedded designs. A 32-bit microcontroller (MCU) is a single-chip computer that integrates a CPU, memory, and peripherals around a 32-bit data path. The PIC32MX1XX/2XX family belongs to the MIPS32 M4K architecture lineage, positioned within Microchip's broader PIC32 portfolio as an entry-level 32-bit MCU family that bridges 8-bit PIC16/PIC18 designs with higher-performance MIPS-based parts. It targets applications needing USB, audio/graphics peripherals, and 5V-tolerant I/O without the cost of higher-end Cortex-M4 devices. Key features include 64 KB Flash and 16 KB SRAM with DMA support, a 10-bit ADC, a Charge Time Measurement Unit (CTMU) for mTouch capacitive sensing, a Real-Time Clock/Calendar (RTCC), and a 1 ns high-resolution time measurement peripheral. The PPS function remaps most digital peripherals to any I/O pin, simplifying PCB routing when compared to fixed-pin microcontrollers, while the PMP interface supports external graphics or parallel memory. Architecturally, the PIC32MX130F064D uses a Harvard-style bus with separate Flash and RAM paths, plus a pre-fetch cache and tightly-coupled DMA controller to sustain throughput at 40 MHz. The MIPS16e instruction mode reduces code size by up to 40% versus 32-bit instructions, which is meaningful in a 64 KB Flash budget. Cryptographic and DSP extensions are absent at this family tier, but USB 2.0 full-speed OTG and a 10/100 Ethernet MAC are available on selected siblings. Typical applications include consumer electronics with USB device interfaces, low-cost audio peripherals, capacitive-touch human-machine interfaces, industrial control front panels using PMP-driven LCDs, and low-power sensor nodes that exploit the deep-sleep current. The wide 2.3-3.6 V supply range also allows direct battery operation in 3.3 V systems. When designing with this MCU, place a 0.1 uF decoupling capacitor adjacent to every VDD/VSS pair, keep the 8 MHz crystal traces short, and observe the ICSP pin pairing rule (PGECx must pair with PGEDx). Use the PPS registers early in firmware development, because remapping cannot be changed at run time without a re-lock sequence. This page synthesizes distributor pricing, drop-in alternatives from Microchip's PIC32 portfolio, and practical design notes beyond the manufacturer datasheet to accelerate your part selection and PCB bring-up.

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PIC32MX130F064D-V/TL - 40MHz 32-bit MCU 64KB Flash | Microchip
PIC32MX130F064D-V/TL

PIC32MX130F064D-V/TL - 40MHz 32-bit MCU 64KB Flash | Microchip

The Microchip Technology PIC32MX130F064D-V/TL is a 32-bit MIPS32 M4K microcontroller operating at 40 MHz, with 64 KB Flash and 16 KB SRAM, housed in a 44-pin VTLA (6x6 mm) exposed-pad surface-mount package. The AEC-Q100 qualified automotive-grade part supports supply voltages from 2.3 V to 3.6 V and consumes less than 0.5 mA/MHz active. A 32-bit microcontroller (MCU) is an integrated processing core that combines a CPU, program memory (Flash), data memory (SRAM), and a rich set of peripherals on a single die. The PIC32MX130F064D belongs to the PIC32MX1xx/2xx family, which sits in the PIC32 -> 32-bit MCU -> microcontroller -> embedded processor hierarchy. These devices target cost-sensitive embedded applications that need MIPS-class computational throughput without the overhead of higher-tier application processors. Key features include the Peripheral Pin Select (PPS) function that remaps digital peripherals to any remappable I/O pin, two I2S/SPI modules for codec and serial communication, a Parallel Master Port (PMP) for graphics interfaces, and support for mTouch capacitive touch buttons and sliders via the on-chip Charge Time Measurement Unit (CTMU). The 5 general-purpose 16-bit timers and a 1 ns high-resolution time measurement block make the device well suited to motor control, switching power conversion, and precision timing tasks. Architecturally, the device uses the MIPS32 M4K core with single-cycle multiply, hardware multiply-accumulate, and a 5-stage pipeline that delivers 1.56 DMIPS/MHz. Five parallel ports provide up to 34 general-purpose I/O lines, and on-chip peripherals include a 10-bit 1 Msps ADC, comparators, and an integrated temperature sensor. The device also supports USB 2.0 full-speed device/host/OTG on select family members and DMA for peripheral-cycle-stealing transfers. Typical applications include automotive body and infotainment subsystems (instrument clusters, HVAC, lighting controllers), industrial HMI panels with graphics, USB consumer devices, capacitive touch user interfaces, and low-cost audio peripherals. The wide temperature grade and AEC-Q100 qualification also make it a fit for chassis and sensor-interface ECUs. When designing with this MCU, allocate the exposed pad (EP) as a top-side copper pour stitched with thermal vias to the ground plane to keep junction temperature below 125 C under full peripheral load. Decouple each VDD/VSS pair with a 100 nF X7R placed within 3 mm of the pin, and add a bulk 4.7 uF tantalum or ceramic capacitor adjacent to the highest-current supply pin. This page synthesizes distributor pricing, drop-in alternatives sourced from Microchip's PIC32MX family, and practical design notes not consolidated in the manufacturer datasheet, helping engineers shorten selection and bring-up time for cost-sensitive 32-bit embedded designs.

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PIC32MX130F064DT-50I/PT - 50MHz 32-bit MCU, 64KB Flash | Microchip
PIC32MX130F064DT-50I/PT

PIC32MX130F064DT-50I/PT - 50MHz 32-bit MCU, 64KB Flash | Microchip

The Microchip Technology PIC32MX130F064DT-50I/PT is a 32-bit MIPS M4K microcontroller running at 50 MHz with 64 KB Flash and 16 KB SRAM, housed in a 44-pin TQFP (10x10 mm) package. It is part of the PIC32MX1xx/2xx 28/36/44-pin general-purpose family aimed at cost-sensitive embedded designs requiring USB, graphics, and advanced analog peripherals. A 32-bit microcontroller (MCU) is an integrated CPU plus memory and peripherals on a single silicon die. Within the broader taxonomy, PIC32MX130 sits at the MCU level, descends from the microprocessor family, and is specialized for real-time control with on-chip Flash, SRAM, ADC, timers, and communication interfaces. Compared with 8-bit and 16-bit MCUs, 32-bit parts offer higher throughput, larger address space, and richer peripherals for connectivity and HMI. Key features include 50 MHz core with 1.56 DMIPS/MHz performance, 64 KB Flash program memory, 16 KB SRAM, USB 2.0 full-speed device/host/OTG, three analog comparators, a 10-bit 1 Msps ADC with up to 28 inputs, RTCC, CTMU for capacitive touch, Peripheral Pin Select (PPS) for flexible remapping, and multiple power-saving modes including Idle, Sleep, and Deep Sleep. The CTMU and RTCC blocks enable capacitive-touch user interfaces and accurate timekeeping without external RTC chips. Architecturally, the PIC32MX130 uses a MIPS M4K 32-bit core with 5-stage pipeline, single-cycle multiply, and separate peripheral buses for USB and DMA. Four DMA channels offload data movement, freeing the CPU for application logic. Two UART, two I2C, and two SPI ports (one configured as I2S) cover most embedded connectivity needs, while separate PLLs for CPU and USB clocks allow independent frequency planning. Typical applications include consumer electronics (USB peripherals, small appliances), industrial control (sensor hubs, simple HMI panels), USB device/host bridges, capacitive-touch keypads using the CTMU, low-cost graphics displays, and battery-powered IoT nodes. The combination of USB, RTCC, and deep-sleep modes suits mains- or battery-powered connected devices. When designing with this part, place a 0.1 uF decoupling capacitor adjacent to each VDD pin and reserve the ICSP/PGD/PGC pins for in-circuit programming. The PPS feature requires that peripheral-to-pin mappings be configured in software before use, and designers should leave those pins at default analog state on reset. Note that 64 KB Flash and 16 KB RAM are modest for the PIC32 family; projects needing larger memory should consider PIC32MX150/170/270 variants or PIC32MK parts. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes that are not consolidated in the manufacturer datasheet, including a focused cross-reference set inside the same PIC32MX1xx family.

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PIC32MX130F064DT-I/ML - 40MHz 32-bit MCU 64KB Flash 44-QFN | Microchip
PIC32MX130F064DT-I/ML

PIC32MX130F064DT-I/ML - 40MHz 32-bit MCU 64KB Flash 44-QFN | Microchip

The Microchip Technology PIC32MX130F064DT-I/ML is a 32-bit RISC microcontroller based on the MIPS32 M4K core running at 40 MHz, integrating 64 KB of Flash and 16 KB of SRAM in a 44-pin QFN (8x8 mm) package with an exposed thermal pad. The device operates from 2.3 V to 3.6 V and provides up to 21 general-purpose I/O pins with Peripheral Pin Select (PPS) remapping. A microcontroller (MCU) is a single-chip computer that integrates a CPU core, program memory, working RAM, and peripherals such as timers, ADC, and communication interfaces. PIC32MX MCUs sit in the hierarchy: microcontroller -> embedded processor -> 32-bit RISC MCU -> MIPS32 M4K family -> PIC32MX1xx/2xx sub-family. They are typically deployed as the system master in mid-complexity embedded designs where deterministic interrupt response and low power per MHz matter more than absolute CPU throughput. Key features of the PIC32MX130F064DT-I/ML include 64 KB Flash with MIPS16e code compression for up to 40% smaller code size, two I2S/SPI modules for codec and serial audio, a Parallel Master Port (PMP) for graphics or external memory interfacing, mTouch capacitive touch support, a 1 ns high-resolution timer capture peripheral, and on-chip temperature measurement. Five 16-bit general-purpose timers and a 10-bit ADC (up to 1 Msps) provide mixed-signal capability. The M4K core with 5-stage pipeline executes most instructions in one cycle, delivering 1.56 DMIPS/MHz at 40 MHz. Combined with the 8-channel DMA controller and zero-overhead hardware multiply/divide, the device efficiently handles protocol stacks (USB device/host, I2S audio), LCD driving via PMP, and real-time control loops without CPU saturation. Typical applications include USB audio peripherals (USB headphones, headsets, VoIP speakers), small graphic LCD HMI panels, industrial sensor nodes with capacitive touch, low-cost data loggers, and consumer appliances with mTouch button/slider interfaces. The wide operating range and industrial temperature grade (-40C to +85C for the I suffix) also suit factory automation peripherals. When designing, leverage Peripheral Pin Select (PPS) to remap digital peripherals to most I/O pins, which dramatically simplifies PCB routing. Ensure the exposed pad (EP) of the QFN package is soldered to a properly sized thermal copper pour to meet the 0.5 mA/MHz typical current draw dissipation budget. This page consolidates distributor pricing, drop-in alternatives within the PIC32MX family, and practical design notes beyond what is printed in the Microchip datasheet.

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PIC32MX130F064DT-I/PT - 32-bit MCU 64KB Flash 40MHz TQFP-44 | Microchip
PIC32MX130F064DT-I/PT

PIC32MX130F064DT-I/PT - 32-bit MCU 64KB Flash 40MHz TQFP-44 | Microchip

The Microchip Technology PIC32MX130F064DT-I/PT is a 32-bit MIPS MCU from the PIC32MX1xx family, integrating 64 KB of Flash program memory and 16 KB of SRAM in a 44-pin TQFP (10x10 mm) package. It runs the MIPS32 M4K core at up to 40 MHz and operates from a 2.3 V to 3.6 V supply. The device targets cost-sensitive embedded designs that need audio/graphics interfaces, USB, and rich analog peripherals in a small surface-mount footprint. Background Knowledge: A microcontroller (MCU) is a single-chip computer that integrates a CPU, memory (Flash for code, SRAM for data), and peripherals on one die. The PIC32MX1xx family uses the MIPS32 M4K architecture rather than the more common ARM Cortex-M cores, offering an alternative for engineers familiar with the PIC ecosystem or seeking MIPS16e code compression to reduce Flash footprint. Within the PIC32MX hierarchy, the MX1/MX2 subfamilies are entry-level, MX3/MX4 add USB and CAN, and MX5/MX6/MX7 scale up peripherals and pin count - so the MX130 sits at the low-cost end of the PIC32 portfolio. Key features: 64 KB Flash + 16 KB SRAM; 40 MHz core with MIPS16e mode for up to 40% smaller code size; 21 general-purpose I/O with Peripheral Pin Select (PPS); USB 2.0 full-speed Device/Host/OTG; two I2S/SPI modules for audio codecs; 10-bit ADC with up to 13 channels; 5 x 16-bit timers + 2 x 32-bit timers; Parallel Master Port (PMP) for graphics; mTouch capacitive touch support; on-chip temperature sensor; industrial -40C to +85C operating range. The TQFP-44 (10x10) package supports hand-reworkable prototypes as well as volume production. Technical depth: the M4K pipeline delivers 1.56 DMIPS/MHz, and combined with MIPS16e the effective code density can rival ARM Thumb-2 while preserving a deterministic MIPS interrupt model. The PPS routing matrix remaps digital peripherals to almost any I/O pin, simplifying board layout and pin-out reuse across variants. The integrated USB 2.0 FS PHY with internal pull-up removes the need for an external transceiver, and the 10-bit 1 Msps ADC with internal bandgap reference supports up to 13 analog inputs. Typical applications: USB HID peripherals (keyboards, mice, custom HID), audio DAC/CODEC front-ends via I2S, low-cost graphics HMI with PMP-driven LCDs, capacitive touch user interfaces, and industrial sensor nodes. The 64 KB Flash/16 KB SRAM combination is well-matched to a USB stack plus small RTOS or bare-metal application. Design consideration: PPS remapping means the firmware must configure peripheral pin assignments before the peripherals are enabled - leaving PPS at its reset default is a common cause of 'dead peripheral' symptoms on first power-up. For USB applications, the internal pull-up must be software-enabled and VBUS sense (if used) wired to a 5V-tolerant pin. This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design notes not found in the manufacturer datasheet, optimized for engineers evaluating PIC32MX1xx selections.

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PIC32MX130F064DT-V/ML - 32-bit 40MHz MCU 64KB Flash | Microchip
PIC32MX130F064DT-V/ML

PIC32MX130F064DT-V/ML - 32-bit 40MHz MCU 64KB Flash | Microchip

The Microchip Technology PIC32MX130F064DT-V/ML is a 32-bit MIPS32 M4K RISC microcontroller with 64KB of Flash program memory and 16KB of SRAM, operating at up to 40 MHz and housed in a 44-pin QFN (8x8 mm) package with automotive AEC-Q100 qualification. The device integrates 64KB Flash (64K x 8), 16KB SRAM, USB 2.0 full-speed device/host/OTG, two I2S/SPI audio interfaces, two UART, two I2C, a Parallel Master Port (PMP) for graphics, Peripheral Pin Select (PPS), up to 13 channels of 10-bit ADC, and five 16-bit timers with input capture and output compare. A 32-bit microcontroller (MCU) is a microprocessor core with 32-bit registers, data paths, and address buses, providing substantially higher computational throughput than 8-bit or 16-bit MCUs while retaining deterministic interrupt response. The PIC32MX1xx family sits in Microchip's broader PIC32 portfolio, which spans the low-pin-count PIC32MX1xx/2xx/3xx/4xx devices up to the high-performance PIC32MZ and Cortex-M-class PIC32MK/MM families. Within the system hierarchy, PIC32MX130F064DT-V/ML belongs to: microcontroller -> 32-bit MCU -> MIPS M4K core -> embedded processing -> semiconductor. This taxonomy helps engineers select compatible families when migrating across product lines. Key specifications include a 2.3V to 3.6V supply range, automotive -40C to +105C operating temperature, 21 general-purpose I/O pins, an on-chip temperature sensor, mTouch capacitive touch support, 1 ns high-resolution time measurement, and less than 0.5 mA/MHz active current. The automotive-grade -V suffix and AEC-Q100 qualification make this part especially well suited to in-cabin and chassis applications where consumer-grade MCUs are not acceptable. Architecturally, the PIC32MX130F064DT-V/ML uses the MIPS32 M4K core with a 5-stage pipeline, hardware multiply/divide, and single-cycle bit manipulation, paired with separate PLLs for the CPU and USB clocks. The combination of PPS remappable peripherals and a dedicated PMP graphics interface delivers flexibility for both human-machine interface (HMI) and connected-USB designs in a single chip. Typical applications include automotive infotainment HMIs, USB-based diagnostic tools, low-cost graphics terminals, capacitive-touch user interfaces, industrial sensor hubs, and embedded audio streaming using the dual I2S modules. The wide operating temperature range and AEC-Q100 grade also suit industrial automation and white-goods control panels. When designing with this device, allocate adequate PCB area under the exposed thermal pad for heat spreading and solder reliability - the 44-QFN package has 0.65 mm pitch. For USB applications, the 48 MHz USB clock must be derived from the dedicated PLL; check the datasheet's oscillator and PLL configuration sections to avoid common crystal-startup pitfalls. This page synthesizes distributor pricing, AEC-Q100 context, drop-in alternatives, and practical design notes that are not collated on the manufacturer datasheet or single distributor page.

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PIC32MX130F064DT-V/PT - 32-bit MCU 64KB Flash 40MHz TQFP-44 | Microchip
PIC32MX130F064DT-V/PT

PIC32MX130F064DT-V/PT - 32-bit MCU 64KB Flash 40MHz TQFP-44 | Microchip

The Microchip Technology PIC32MX130F064DT-V/PT is a 32-bit MIPS32 M4K RISC microcontroller with 64KB Flash and 16KB SRAM, operating at up to 40 MHz in a 44-pin TQFP (10x10 mm) package with automotive AEC-Q100 qualification. It integrates USB, two I2S/SPI modules, two UART, two I2C, a Parallel Master Port (PMP) for graphics, Peripheral Pin Select (PPS), mTouchTM capacitive touch support, a 1 ns high-resolution timer, on-chip temperature sensor, and up to 21 general-purpose I/O pins in a 2.3V-3.6V supply range. The -V suffix designates the automotive temperature grade of -40C to +105C. A microcontroller is a complete embedded computing unit that integrates a CPU core, program memory (Flash), data memory (SRAM), and a rich set of peripherals on a single silicon die. Within the broader taxonomy, this PIC32MX1XX/2XX family sits in the 32-bit RISC MCU class, which itself belongs to embedded processors, microcontrollers, and ultimately semiconductors. The PIC32MX130 line specifically targets cost-effective applications requiring USB connectivity, audio/graphical interfaces (via PMP), and advanced analog features at low active current under 0.5 mA/MHz. Key features of the PIC32MX130F064DT-V/PT include MIPS16e mode for up to 40% smaller code size, five 16-bit general-purpose timers, up to 4 hardware DMA channels with automatic data size detection, separate PLLs for the CPU and USB clocks, dual I2S modules for codec interfacing, and configurable Watchdog Timer with on-chip low-power RC oscillator. Peripheral Pin Select (PPS) remaps digital peripherals to a wide choice of physical pins, dramatically easing PCB routing. The PMP enables direct connection to graphical LCDs, and mTouchTM supports capacitive touch buttons and sliders. Architecture-wise, the device combines a Harvard-style 32-bit MIPS32 M4K core with 5-stage pipeline, 32 x 32-bit register file, and dedicated hardware multiply/divide. Up to 4 DMA channels operate autonomously from the CPU, reducing interrupt load and improving throughput for USB, UART, SPI, and ADC transfers. Two separate PLLs let the CPU and USB clock domains run independently at optimal frequencies while sharing one 8 MHz primary oscillator. Typical applications include automotive body and infotainment modules, USB human-interface devices (HIDs), audio playback units with I2S codecs, low-cost graphical control panels, capacitive-touch user interfaces, and industrial sensor hubs. AEC-Q100 qualification makes the -V variant especially suited to under-hood and cabin automotive electronics. When designing with this MCU, ensure VDDCORE decoupling follows Microchip's recommended layout (typically 10 uF plus 0.1 uF close to the core supply). USB applications require the on-chip transceiver's 48 MHz PLL to be tuned to within +/-0.25%, and the D+/D- trace lengths matched to 90 ohms differential impedance. Always budget for boot Flash and configuration bits when sizing program memory against the 64 KB Flash limit. This page synthesizes distributor pricing, automotive-grade alternatives, and practical design notes not consolidated in the manufacturer datasheet, helping engineers select the right PIC32MX130 variant for AEC-Q100 grade versus industrial/medical use cases.

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PIC32MX130F128H-50I/MR - 50MHz 32-bit MCU, 128KB Flash | Microchip
PIC32MX130F128H-50I/MR

PIC32MX130F128H-50I/MR - 50MHz 32-bit MCU, 128KB Flash | Microchip

The Microchip Technology PIC32MX130F128H-50I/MR is a 32-bit MIPS32 M4K microcontroller running up to 50 MHz / 83 DMIPS, equipped with 128 KB Flash and 16 KB SRAM, and housed in a 64-pin QFN (MR) 9x9 mm package with industrial -40C to +85C temperature rating. A PIC32MX microcontroller is a 32-bit flash MCU family from Microchip that combines a MIPS M4K core with rich digital peripherals, suitable for connected embedded products, consumer devices, and industrial control. The PIC32MX130F128H-50I/MR is the lower-pin-count sibling in the family and targets cost-sensitive applications that still need 32-bit performance, DSP acceleration (single-cycle MAC), and ample code space. The M4K core architecture retains the PIC ecosystem's reputation for deterministic interrupt response while adding 32-bit register width and 83 DMIPS throughput at 50 MHz. Key features highlighted in the Microchip datasheet include 128 KB single-cycle Flash, 16 KB SRAM, Peripheral Pin Select (PPS) for flexible signal routing, three I2S/SPI modules, a Parallel Master Port (PMP) with dual buffers for graphics or memory-mapped interfaces, an integrated 10-bit ADC, and CTMU for capacitive touch sensing. USB and CAN are not present on this device, so designers targeting those should look at the PIC32MX2xx/5xx siblings. The device integrates 5 16-bit timers, 5 IC/OC/PWM channels, two I2C, two UART, and supports up to 49 digital I/O via PPS. The 64-QFN 9x9 mm package exposes most of the available peripherals and provides a thermal pad for improved heat dissipation in continuous-operation industrial environments. Typical applications include low-cost HMI panels with small TFTs driven by PMP, consumer audio accessories using I2S, multi-protocol sensor hubs with UART and I2C bridges, capacitive touch keypads via CTMU, and small logic-replacement or protocol-bridging controllers. The wide industrial temperature range and 50 MHz headroom also suit factory sensor nodes and serial-bridge appliances. When designing with this part, plan the PPS mapping early because PPS groups constrain which pins can be assigned to which peripherals. Always provide a 1uF + 0.1uF decoupling pair near each VDD pin and confirm that any high-frequency I/O traces are length-matched for SPI or I2S synchronous operation. This page consolidates distributor pricing, same-family drop-in alternatives, and practical design notes not duplicated from the manufacturer datasheet, including cross-references to PIC32MX1XX/2XX/5XX 64/100-pin family siblings.

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PIC32MX130F128H-50I/PT - 50MHz 32-bit MCU 128KB Flash | Microchip
PIC32MX130F128H-50I/PT

PIC32MX130F128H-50I/PT - 50MHz 32-bit MCU 128KB Flash | Microchip

The Microchip Technology PIC32MX130F128H-50I/PT is a 32-bit MIPS MCU running up to 50 MHz/83 DMIPS, integrating 128 KB Flash and 16 KB SRAM in a 64-pin TQFP (10x10 mm) package. The device operates from 2.5 V to 3.6 V and exposes the full PIC32MX1xx/2xx peripheral set including two I2S, four SPI, two I2C, five UART, a 10-bit 1 Msps ADC, a Parallel Master Port (PMP), and Peripheral Pin Select (PPS) for flexible signal mapping. A 32-bit microcontroller (MCU) is a single-chip computer that integrates a high-performance processor core, program and data memory, and configurable peripherals. The PIC32MX130 family specifically occupies the low-cost, low-power entry tier of Microchip's PIC32 lineup - bridging 8-bit PIC16/PIC18 designs and the higher-end PIC32MX3/4/5/6/7 families. Within the broader taxonomy it sits under microcontroller -> embedded MCU -> 32-bit MCU -> MIPS M4K core device. The 50 MHz core delivers 83 DMIPS, comparable to legacy ARM Cortex-M3 parts in the same cost band, while keeping the 8-bit PIC instruction ecosystem familiar to legacy Microchip developers. Key features include 128 KB single-cycle Flash with live update support, 16 KB SRAM, a 10-bit 1 Msps 13-channel ADC, a CTMU for capacitive touch and time measurement, two comparators, a 5-bit DAC, and PMP with dual read/write buffers for graphics or external memory interfaces. PPS remaps digital peripherals onto most I/O pins, easing PCB layout. The CTMU and mTouch capability enable capacitive touch sensing without external components. Typical applications include industrial control (HMI panels, sensor hubs), consumer audio (Bluetooth speakers with I2S codecs), USB-to-UART bridges, graphical low-cost displays using PMP, capacitive touch key pads, and low-power IoT edge nodes. The 128 KB Flash / 16 KB RAM headroom supports IPv4 stacks and lightweight USB device firmware. Design consideration: the device requires a 2.5 V or 3.3 V rail - many analog rails cannot be fed directly. Place a 0.1 µF + 10 µF bulk pair within 5 mm of VDD/AVDD pins and use a ferrite bead between VDD and AVDD to keep switching noise out of ADC measurements. Configure unused I/O as outputs low to minimize I_dd leakage. This page combines distributor pricing, drop-in PIC32 alternatives, and practical design notes that the manufacturer datasheet alone does not provide - supporting faster part selection and PCB reuse decisions.

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PIC32MX130F128H-I/MR - 32-bit 50MHz MCU, 128KB Flash | Microchip
PIC32MX130F128H-I/MR

PIC32MX130F128H-I/MR - 32-bit 50MHz MCU, 128KB Flash | Microchip

The Microchip Technology PIC32MX130F128H-I/MR is a 32-bit MIPS32 M4K microcontroller running up to 50 MHz / 83 DMIPS, integrating 128 KB of Flash and 16 KB of SRAM in a 64-pin QFN (MR, 9x9 mm) package. It supports an industrial operating range of -40°C to +85°C, draws power from a 2.3 V to 3.6 V supply, and provides 53 general-purpose I/O pins through Peripheral Pin Select (PPS) routing. A microcontroller (MCU) is a single-chip computer that integrates a CPU core, volatile and non-volatile memory, and a configurable mix of peripherals. PIC32MX devices sit in the mid-performance tier of Microchip's PIC32 portfolio, bridging 8-bit PIC16/PIC18 designs and the higher-end PIC32MZ parts, and they are widely used in consumer, industrial, and IoT applications that need more horsepower than 8-bit parts can deliver but do not require DSP or floating-point capability. Key features of the PIC32MX130F128H-I/MR include two I2S and four SPI modules for audio codec and high-speed serial connectivity, USB 2.0 full-speed device/host/OTG support, a 10-bit ADC with up to 1 Msps conversion rate, a Parallel Master Port (PMP) with dual read/write buffers for graphics interfaces, an mTouch capacitive-touch peripheral, and a CTMU (Charge Time Measurement Unit) for time-of-flight and capacitive measurements. The 5-stage pipelined M4K core delivers 1.56 DMIPS/MHz and executes most instructions in a single cycle, while dedicated DMA reduces CPU load on data-movement tasks. Typical applications for this part include USB peripherals, audio streaming devices using I2S codecs, low-cost graphics interfaces driven by PMP, capacitive-touch user panels via mTouch, and industrial control nodes that need deterministic serial communication. The 53 I/O pins and PPS flexibility make it a strong fit for designs that consolidate UART, SPI, I2C, and timer resources on a single device without external glue logic. When designing with the PIC32MX130F128H-I/MR, place the ICSP programming pins (PGECx/PGEDx) on accessible test points to keep field firmware updates practical. Ensure all VDD/VSS pins are connected even if some appear unused, since missing power pins can prevent proper programming on production boards. This page synthesizes Microchip datasheet excerpts, drop-in same-package alternatives from the PIC32MX family, and practical design notes not found in the basic distributor listings.

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PIC32MX130F128H-V/MR - 32-bit MCU, 128KB Flash, 64-QFN | Microchip
PIC32MX130F128H-V/MR

PIC32MX130F128H-V/MR - 32-bit MCU, 128KB Flash, 64-QFN | Microchip

The Microchip Technology PIC32MX130F128H-V/MR is a 32-bit MIPS32 M4K microcontroller running up to 50 MHz / 83 DMIPS, with 128 KB Flash and 16 KB SRAM, housed in a 64-pin QFN (MR, 9x9 mm) package with exposed thermal pad. The "V" suffix denotes the -40C to +105C industrial temperature grade suitable for thermally stressed environments, and the "MR" suffix identifies the 64-QFN surface-mount package. The part is AEC-Q100 qualified, enabling automotive deployment alongside industrial and consumer designs. A PIC32MX microcontroller is a 32-bit MIPS-based MCU from Microchip's PIC32 family, sitting between 16-bit PIC24/dsPIC and 32-bit ARM Cortex-M devices. It combines a Harvard-architecture M4K core with rich peripherals such as USB, CAN, I2S, PMP, and Peripheral Pin Select (PPS) routing, making it a versatile choice for connectivity, graphical, and real-time control applications. Key features of the PIC32MX130F128H-V/MR include up to 50 MHz / 83 DMIPS core performance, two I2S and four SPI modules for codec and serial communications, Peripheral Pin Select (PPS) for flexible peripheral-to-pin mapping, Parallel Master Port (PMP) with dual buffers for graphics interfaces, a 10-bit 1 Msps ADC with up to 13 channels, and an mTouch capacitive-touch peripheral for touch-sensing user input. The 128 KB Flash supports large application firmware with library overhead. Architecturally, the device integrates a 5-stage pipeline M4K core with single-cycle multiplication, a prefetch cache to accelerate Flash execution, an 8-channel DMA controller for low-CPU-overhead data movement, and a 10-bit 1 Msps analog-to-digital converter. The 2.5V/3.3V dual-voltage core with on-chip regulator simplifies single-supply 3.3V designs while maintaining low active power consumption typical of the PIC32MX1xx family. Typical applications include automotive body and infotainment subsystems, industrial HMI panels with PMP-driven LCDs, USB peripherals such as HID and CDC class devices, IoT sensor nodes, audio playback products using I2S DACs, and capacitive-touch user interfaces. The wide operating temperature range and AEC-Q100 qualification support under-hood and dashboard deployments. When designing with this MCU, allocate the 128 KB Flash budget between bootloader, application, and library code early; PPS reassignment must be configured in code at startup to avoid pin conflicts; the QFN EP requires thermal via stitching under the exposed pad for reliable heat dissipation in industrial/automotive environments. This page synthesizes distributor pricing, drop-in PIC32MX alternatives, PPS-aware design notes, and AEC-Q100 qualification context not found aggregated on any single manufacturer page.

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PIC32MX130F128HT-50I/PT - 32-bit MCU 50MHz 128KB Flash | Microchip
PIC32MX130F128HT-50I/PT

PIC32MX130F128HT-50I/PT - 32-bit MCU 50MHz 128KB Flash | Microchip

The Microchip Technology PIC32MX130F128HT-50I/PT is a 32-bit MIPS M4K microcontroller operating at 50 MHz with 128 KB Flash and 16 KB SRAM, housed in a 64-pin TQFP (10x10 mm) industrial-grade package. It delivers up to 83 DMIPS performance and integrates Peripheral Pin Select (PPS), Parallel Master Port (PMP) with dual read/write buffers for graphics interfaces, two I2S modules, four SPI modules, and a 10-bit ADC supporting up to 1 Msps conversion. A microcontroller (MCU) is a single-chip computer containing a processor core, program memory, data memory, and programmable I/O peripherals. The PIC32MX family belongs to the broader hierarchy of embedded processor -> microcontroller -> 32-bit MCU -> MIPS-based MCU, designed by Microchip for cost-sensitive embedded applications that need higher performance than 8-bit or 16-bit cores without stepping up to ARM Cortex-M cost. The MIPS M4K core used here combines deterministic interrupt response with a 5-stage pipeline and hardware multiply/divide. Key features include 128 KB Flash program memory, 16 KB SRAM, four SPI, two I2C, two UART, two I2S, PMP, 10-bit 1 Msps ADC with up to 28 analog inputs via PPS, CTMU for capacitive touch, and a wide operating voltage range. Industrial temperature range of -40C to +85C suits factory automation, building controls, and outdoor equipment. The PIC32MX130 uses a Harvard architecture with separate Flash and SRAM buses, allowing simultaneous instruction fetch and data access. PPS remaps digital peripherals to almost any I/O pin, dramatically simplifying PCB layout when multiple SPI, UART, or PWM channels must be routed. PMP with dual buffers enables direct connection to graphical LCDs and parallel memory devices without external glue logic. Typical applications include low-cost graphical HMI panels, sensor hubs with I2S audio capture, industrial controllers, home appliances, USB device bridges, and embedded data loggers. The combination of I2S, PMP, CTMU, and PPS allows a single chip to replace several external components. Design consideration: route the ICSP/ICD pins (PGECx/PGEDx) to a 6-pin header for in-circuit debugging and Flash programming - omitting this costs zero board area but blocks field firmware updates. Decouple VDDCORE/VSS pair with 100 nF plus 10 uF ceramic close to the pins. This page synthesizes distributor pricing, verified drop-in alternatives, and practical design notes beyond what the Microchip datasheet alone provides for engineering evaluation.

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PIC32MX130F128HT-I/MR - 32-bit MCU, 128KB Flash, 64-QFN | Microchip
PIC32MX130F128HT-I/MR

PIC32MX130F128HT-I/MR - 32-bit MCU, 128KB Flash, 64-QFN | Microchip

The Microchip Technology PIC32MX130F128HT-I/MR is a 32-bit MIPS32 M4K microcontroller offering 128KB Flash and 16KB RAM in a 64-pin 9x9 mm QFN (MR) package with exposed thermal pad. Operating at up to 50 MHz/83 DMIPS, this PIC32MX1xx family member integrates two I2S and four SPI modules for audio and serial communication, a Parallel Master Port with dual buffers, and full Peripheral Pin Select (PPS) remappable I/O. The 'T' suffix denotes tape-and-reel packaging, 'I' denotes the industrial -40C to +85C temperature grade, and 'MR' is the 64-QFN package code. A microcontroller (MCU) is a single-chip computer containing a processor core, program memory (Flash), working memory (RAM), and programmable peripherals. PIC32MX devices belong to the 32-bit MCU hierarchy (microcontroller -> 32-bit MCU -> MIPS-based MCU -> PIC32 family) and target general-purpose embedded applications requiring USB, CAN, audio, or graphics-capable peripherals without the cost of higher-tier Cortex-M parts. Key features of this part include: 128KB on-chip Flash, 16KB SRAM, 10-bit ADC with up to 16 channels, four UART modules, two I2C modules, two I2S/SSI modules for digital audio, USB 2.0 full-speed OTG, a Charge Time Measurement Unit (CTMU) for touch sensing, and an on-chip 8 MHz and 32 kHz oscillator. The 64-QFN 9x9 mm package provides a compact footprint with an exposed pad enabling efficient thermal dissipation for industrial-grade designs. The PIC32MX130F128H family uses the MIPS32 M4K Harvard architecture with 5-stage pipeline, single-cycle multiply, and hardware divide. Code execution is fetched from Flash through a 16KB prefetch cache to deliver zero-wait-state performance up to 50 MHz. PPS remaps most digital peripherals to any of the remappable I/O pins, dramatically simplifying board layout for mixed-signal designs. Typical applications include consumer audio docks (using I2S to drive external DACs and the CTMU for capacitive touch keypads), USB human-interface devices such as keyboards and HID-class peripherals, low-cost graphics HMI terminals driving small TFT displays via PMP, sensor-hub controllers for industrial monitoring, and firmware-replaceable motor-control front ends. The wide peripheral mix makes it well suited as a feature-rich drop-in upgrade for 8-bit PIC users migrating to 32-bit. Designers should plan for two decoupling capacitors per VDD/AVDD pin pair (0.1 uF ceramic + 4.7 uF bulk), keep the 64-QFN exposed pad soldered to a continuous ground copper pour for thermal relief, and confirm the PPS mapping before assigning pin functions in code to avoid runtime conflicts. Programming is supported by MPLAB X IDE with the XC32 compiler and the MPLAB Harmony framework. This page consolidates distributor pricing, same-family drop-in alternatives, application context, and design notes that complement - rather than duplicate - the manufacturer datasheet.

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PIC32MX130F128HT-I/PT - 50MHz 32-bit MCU 128KB Flash TQFP-64 | Microchip
PIC32MX130F128HT-I/PT

PIC32MX130F128HT-I/PT - 50MHz 32-bit MCU 128KB Flash TQFP-64 | Microchip

The Microchip PIC32MX130F128HT-I/PT is a 32-bit MIPS32 M4K microcontroller running at up to 50 MHz / 83 DMIPS, packaged in a 64-pin TQFP (10x10 mm) with 128 KB Flash and 16 KB SRAM. The PIC32MX130 family integrates two I2S modules, four SPI/I2S interfaces, and a Parallel Master Port (PMP) with dual read/write buffers for graphics interfaces, plus Peripheral Pin Select (PPS) for flexible signal routing. A 32-bit microcontroller (MCU) is an integrated circuit containing a CPU core, program memory, data memory, and a rich set of on-chip peripherals targeted at embedded systems. PIC32MX devices sit in the hierarchy: MCU -> 32-bit MCU -> MIPS M4K core -> PIC32MX1xx/2xx family -> Microchip MCU lineup. They typically follow Harvard architecture, RISC instruction sets, and provide deterministic interrupt latency, making them suitable for real-time control and consumer/HMI applications. Key features of this device include 53 digital I/O pins with PPS remapping, a 10-bit 1 Msps ADC with up to 13 channels, five 16-bit timers/counters, two comparators, two I2C and two UART modules, and an on-chip 8 MHz internal oscillator with PLL. The device operates from 2.3V to 3.6V across an industrial -40C to +85C temperature range. The TQFP-64 footprint is the largest package option in this family, exposing the full peripheral set including the PMP graphics interface and maximum I/O count. The PIC32MX130F128HT-I/PT uses Microchip's MPLAB X IDE, MPLAB Harmony, and XC32 compiler toolchain, with extensive middleware support via the Harmony framework. Pin-compatible variants in TQFP-64 include the PIC32MX130F064H and PIC32MX230F128H family members, which differ in Flash size or peripheral mix. The die footprint is shared with the PIC32MX1xx/2xx series, simplifying PCB layout reuse across product tiers. Typical applications include industrial control panels with TFT LCDs (PMP + graphics library), consumer audio products (I2S codec interface), USB device peripherals, sensor hubs, and home appliance HMI. Designers favor this part for low-cost 32-bit performance combined with mature MPLAB ecosystem support and long-life Microchip supply commitments. When designing, ensure decoupling follows Microchip's recommended pattern: a 0.1 uF ceramic as close as possible to each VDD/AVDD pair plus a bulk 10 uF tantalum or ceramic. The PMP bus is 8-bit multiplexed and benefits from 100 ohm series resistors on long traces. Leave the programming/debug pins (PGECx/PGEDx) accessible for production programming. This page synthesizes distributor pricing, TQFP-64 drop-in alternatives, and practical MPLAB design notes not found in the manufacturer datasheet.

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