PIC32MX130F128H-50I/PT - 50MHz 32-bit MCU 128KB Flash | Microchip
Teilenummer: PIC32MX130F128H-50I/PT ✓ Aktiv| Menge | Stückpreis | Gesamt |
|---|---|---|
| 1 | $3.4 | $3,40 |
| 10 | $3.06 | $30,60 |
| 100 | $2.65 | $265,00 |
| 500 | $2.34 | $1.170,00 |
| 1.000 | $2.04 | $2.040,00 |
PIC32MX130F128H-50I/PT Übersicht
A 32-bit microcontroller (MCU) is a single-chip computer that integrates a high-performance processor core, program and data memory, and configurable peripherals. The PIC32MX130 family specifically occupies the low-cost, low-power entry tier of Microchip's PIC32 lineup - bridging 8-bit PIC16/PIC18 designs and the higher-end PIC32MX3/4/5/6/7 families. Within the broader taxonomy it sits under microcontroller -> embedded MCU -> 32-bit MCU -> MIPS M4K core device. The 50 MHz core delivers 83 DMIPS, comparable to legacy ARM Cortex-M3 parts in the same cost band, while keeping the 8-bit PIC instruction ecosystem familiar to legacy Microchip developers.
Key features include 128 KB single-cycle Flash with live update support, 16 KB SRAM, a 10-bit 1 Msps 13-channel ADC, a CTMU for capacitive touch and time measurement, two comparators, a 5-bit DAC, and PMP with dual read/write buffers for graphics or external memory interfaces. PPS remaps digital peripherals onto most I/O pins, easing PCB layout. The CTMU and mTouch capability enable capacitive touch sensing without external components.
Typical applications include industrial control (HMI panels, sensor hubs), consumer audio (Bluetooth speakers with I2S codecs), USB-to-UART bridges, graphical low-cost displays using PMP, capacitive touch key pads, and low-power IoT edge nodes. The 128 KB Flash / 16 KB RAM headroom supports IPv4 stacks and lightweight USB device firmware.
Design consideration: the device requires a 2.5 V or 3.3 V rail - many analog rails cannot be fed directly. Place a 0.1 µF + 10 µF bulk pair within 5 mm of VDD/AVDD pins and use a ferrite bead between VDD and AVDD to keep switching noise out of ADC measurements. Configure unused I/O as outputs low to minimize I_dd leakage.
This page combines distributor pricing, drop-in PIC32 alternatives, and practical design notes that the manufacturer datasheet alone does not provide - supporting faster part selection and PCB reuse decisions.
Drop-in-Alternativen für PIC32MX130F128H-50I/PT – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.
Varianten dieser Serie
Modelle derselben Serie, die drop-in-kompatibel sind mit PIC32MX130F128H-50I/PT (gleiche Bauform und Footprint) – abweichend in Package, ADC, I/O Pins, Operating Temperature, Core Architecture.
Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:
PIC32MX130F128H-I/PT
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
PIC32MX130F128HT-50I/PT
✅ Drop-In✓ Auf Lager
$3.05 / Stück
Datenblatt ansehen →PIC32MX130F256H-50I/PT
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
PIC32MX230F128H-50I/PT
✅ Drop-In✓ Auf Lager
$3.95 / Stück
Datenblatt ansehen →PIC32MX130F064H-I/PT
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
PIC32MX130F128H-50I/PT Grenzwerte & elektrische Eigenschaften
| Core Architecture | MIPS32 M4K 32-bit RISC |
| Maximum CPU Frequency | 50 MHz |
| DMIPS | 83 DMIPS |
| Flash Memory | 128 KB |
| SRAM | 16 KB |
| Operating Voltage | 2.5 V to 3.6 V |
| ADC | 10-bit, 1 Msps, 13 channels |
| Comparators | 2 |
| DAC | 5-bit |
| UART Modules | 5 |
| SPI Modules | 4 (up to 25 MHz) |
| I2C Modules | 2 |
| I2S Modules | 2 |
| PMP (Parallel Master Port) | Yes, dual read/write buffers |
| CTMU | Yes (mTouch capacitive touch, time measurement) |
| Peripheral Pin Select (PPS) | Yes |
| Timers | 5 x 16-bit, 2 x 32-bit |
| Input Capture | 5 |
| Output Compare | 5 |
| Gehäuse | 64-pin TQFP (PT) 10x10 mm |
| Operating Temperature (Industrial) | -40 °C to +85 °C |
| Montageart | Surface Mount |
| MSL-Level | 3 (168 hours) |
| RoHS-Status | Compliant |
PIC32MX130F128H-50I/PT Pin-Konfiguration
| Pin 1 | RB5/PMD5/SDA1 — I/O port / PMP data / I2C1 SDA |
| Pin 2 | RB4/PMD4/SCL1 — I/O port / PMP data / I2C1 SCL |
| Pin 3 | RB3/PMD3/AN9 — I/O port / PMP data / ADC input |
| Pin 4 | RB2/PMD2/AN8 — I/O port / PMP data / ADC input |
| Pin 5 | RB1/PMD1/AN7 — I/O port / PMP data / ADC input |
| Pin 6 | RB0/PMD0/AN6 — I/O port / PMP data / ADC input |
| Pin 7 | RB6/PGEC2 — I/O port / ICSP clock 2 |
| Pin 8 | RB7/PGED2 — I/O port / ICSP data 2 |
| Pin 9 | RB8/PMD8 — I/O port / PMP data |
| Pin 10 | RB9/PMD9 — I/O port / PMP data |
| Pin 11 | RB10/PMD10 — I/O port / PMP data |
| Pin 12 | RB11/PMD11 — I/O port / PMP data |
| Pin 13 | RB12/PMD12 — I/O port / PMP data |
| Pin 14 | RB13/PMD13/CTPLS — I/O port / PMP data / CTMU pulse |
| Pin 15 | RB14/PMD14/CVREF — I/O port / PMP data / CV reference |
| Pin 16 | RB15/PMD15 — I/O port / PMP data |
| Pin 17 | AVDD — Analog supply voltage |
| Pin 18 | AVSS — Analog ground |
| Pin 19 | VDD — Digital supply voltage |
| Pin 20 | VSS — Digital ground |
| Pin 21 | RC1/SDO1 — I/O port / SPI1 data out |
| Pin 22 | RC2/SDI1 — I/O port / SPI1 data in |
| Pin 23 | RC3/SCK1 — I/O port / SPI1 clock |
| Pin 24 | RC4/SS1 — I/O port / SPI1 slave select |
| Pin 25 | RD8/PMRD — I/O port / PMP read strobe |
| Pin 26 | RD9/PMWR/PMCS2 — I/O port / PMP write / chip select 2 |
| Pin 27 | RD10/PMCS1 — I/O port / PMP chip select 1 |
| Pin 28 | RD11/PMALL/PMCS — I/O port / PMP latch / chip select |
| Pin 29 | RD0/SDO2 — I/O port / SPI2 data out |
| Pin 30 | RD1/SDI2 — I/O port / SPI2 data in |
| Pin 31 | RD2/SCK2 — I/O port / SPI2 clock |
| Pin 32 | RD3/SS2 — I/O port / SPI2 slave select |
| Pin 33 | RD4/AN24 — I/O port / ADC input |
| Pin 34 | RD5/AN25 — I/O port / ADC input |
| Pin 35 | RD6/AN26 — I/O port / ADC input |
| Pin 36 | RD7/AN27 — I/O port / ADC input |
| Pin 37 | RA0/TMS — I/O port / JTAG TMS |
| Pin 38 | RA1/TCK — I/O port / JTAG TCK |
| Pin 39 | RA2/TDI — I/O port / JTAG TDI |
| Pin 40 | RA3/TDO — I/O port / JTAG TDO |
| Pin 41 | RA4/SOSCO — I/O port / secondary oscillator out |
| Pin 42 | RA5/SOSCI — I/O port / secondary oscillator in |
| Pin 43 | RA6/OC1 — I/O port / Output Compare 1 |
| Pin 44 | RA7/OC2 — I/O port / Output Compare 2 |
| Pin 45 | RA8/IC1 — I/O port / Input Capture 1 |
| Pin 46 | RA9/IC2 — I/O port / Input Capture 2 |
| Pin 47 | RA10/IC3 — I/O port / Input Capture 3 |
| Pin 48 | RC14/OSC1/CLKI — Oscillator crystal / external clock in |
| Pin 49 | RC15/OSC2/CLKO — Oscillator crystal / clock out |
| Pin 50 | VSS — Digital ground |
| Pin 51 | VDD — Digital supply voltage |
| Pin 52 | RF6/INDX1 — I/O port / QEI index |
| Pin 53 | RC13/SDA2 — I/O port / I2C2 SDA |
| Pin 54 | RC12/SCL2 — I/O port / I2C2 SCL |
| Pin 55 | RG9/PMD7 — I/O port / PMP data |
| Pin 56 | RG8/PMD6 — I/O port / PMP data |
| Pin 57 | RG7/SCLK1 — I/O port / I2S1 bit clock |
| Pin 58 | RG6/SDO3 — I/O port / SPI3 data out |
| Pin 59 | RG5/QEA1 — I/O port / QEI phase A |
| Pin 60 | RG4/QEB1 — I/O port / QEI phase B |
| Pin 61 | RG3/PMWR — I/O port / PMP write |
| Pin 62 | RG2/PMRD — I/O port / PMP read |
| Pin 63 | RG1/PMA1 — I/O port / PMP address 1 |
| Pin 64 | RG0/PMA0 — I/O port / PMP address 0 |
Typische Anwendungen
PIC32MX130F128H-50I/PT ist geeignet für 6 Anwendungs: Industrial HMI and Control Panels, Consumer Audio Devices with I2S Codecs, Capacitive Touch Keypads (mTouch), Low-Cost Graphical Displays via PMP, USB-to-UART Bridge and Protocol Converters, Portable Battery-Powered Sensor Hubs.
Industrial HMI and Control Panels
The PIC32MX130F128H-50I/PT is well-suited for industrial HMI panels and control boards thanks to its 50 MHz/83 DMIPS MIPS32 M4K core, PMP with dual read/write buffers for graphics displays, and CTMU for capacitive key inputs. The 128 KB Flash holds graphical firmware plus a TCP/IP stack for OPC-UA gateways, while the 13-channel 10-bit ADC reads analog sensors at 1 Msps. PPS remaps peripherals onto most I/O so PCB layout can route noise-sensitive analog away from switching traces. Industrial -40 to +85 °C operation matches the IEC 60068 environmental grade required for factory floor deployment.
Empfohlen
Consumer Audio Devices with I2S Codecs
Bluetooth speakers, smart soundbars, and aftermarket audio DACs pair well with PIC32MX130F128H-50I/PT because it integrates two I2S interfaces - one for input, one for output - alongside the four SPI modules used to configure external CODECs and DSP front-ends. The 50 MHz core sustains 48 kHz/24-bit streams without dropping samples, and 16 KB RAM is sufficient to double-buffer small audio frames. PPS flexibility lets the same TQFP-64 footprint route I2S lanes away from PWM motor-control lines in a smart-speaker enclosure, minimizing crosstalk without a board rework.
Empfohlen
Capacitive Touch Keypads (mTouch)
The PIC32MX130F128H-50I/PT integrates the CTMU peripheral that powers Microchip's mTouch capacitive-sensing library, enabling robust touch electrodes on glass or PCB surfaces without dedicated touch ICs. With 16 KB RAM and 50 MHz processing, the device can scan more than 32 electrodes at 100 Hz with hardware-averaged debouncing. PPS rerouting allows the touch sense pins to be placed where the industrial designer wants them rather than at fixed package locations, simplifying EMI-robust keypad layout.
Empfohlen
Low-Cost Graphical Displays via PMP
The Parallel Master Port (PMP) on the PIC32MX130F128H-50I/PT drives small TFT or OLED displays with 8-bit or 16-bit parallel data, dual read/write buffers, and dedicated timing signals, eliminating external display controllers. At 50 MHz the core can refresh a 320x240 QVGA panel at 30 fps while reserving headroom for HMI logic. The 16 KB SRAM framebuffer accommodates partial-screen updates, and PPS lets the data bus land on any convenient pin group to simplify multilayer PCB routing.
Empfohlen
USB-to-UART Bridge and Protocol Converters
When stepping up to USB is desired later, the PIC32MX130F128H-50I/PT shares its TQFP-64 footprint with PIC32MX230F128H-50I/PT, which adds USB 2.0 Full-Speed OTG. Engineers can prototype firmware on the PIC32MX130 and migrate the same PCB to PIC32MX230 once USB stack support is required, preserving firmware libraries thanks to shared MIPS M4K core. The five UART modules and dual I2C of PIC32MX130 make it a flexible protocol-converter choice even without USB today.
Empfohlen
Portable Battery-Powered Sensor Hubs
Portable sensor hubs for environmental monitoring or asset tracking use the PIC32MX130F128H-50I/PT's low-power sleep modes (down to <1 µA with retention) combined with the 10-bit ADC to read temperature, humidity, or analog front-ends at low duty cycle. The 2.5-3.6 V supply range accepts a single Li-Ion cell with LDO regulation, and CTMU provides time-of-flight measurement for ultrasonic ranging. 128 KB Flash supports Bluetooth LE firmware stacks for IoT edge nodes; 16 KB RAM buffers sensor bursts before transmission.
Empfohlen
Zusammenfassung der empfohlenen Produkte
Technische Referenzdaten für PIC32MX130F128H-50I/PT – Vergleich, Designhinweise und Compliance-Informationen.
Auswahlhilfe
Vergleich mit Alternativen
| Parameter | Dieses Produkt | PIC32MX130F128H-I/PT | PIC32MX130F128HT-50I/PT | PIC32MX130F256H-50I/PT | PIC32MX230F128H-50I/PT | PIC32MX130F064H-I/PT |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 64-pin TQFP (PT) 10x10 mm | 64-pin TQFP (PT) 10x10 mm - same | 64-pin TQFP (PT) 10x10 mm - same | 64-pin TQFP (PT) 10x10 mm - same | 64-pin TQFP (PT) 10x10 mm - same | 64-pin TQFP (PT) 10x10 mm - same |
| Maximum CPU Frequency | 50 MHz | 40 MHz (-20%) | 50 MHz (same) | 50 MHz (same) | 50 MHz (same) | 40 MHz (-20%) |
| DMIPS | 83 DMIPS | 66 DMIPS | 83 DMIPS | 83 DMIPS | 83 DMIPS | 66 DMIPS |
| Flash Memory | 128 KB | 128 KB (same) | 128 KB (same) | 256 KB (+100%) | 128 KB (same) | 64 KB (-50%) |
| SRAM | 16 KB | 16 KB (same) | 16 KB (same) | 16 KB (same) | 16 KB (same) | 16 KB (same) |
| USB 2.0 Full-Speed | No | No | No | No | Yes (added) | No |
| Operating Temperature (Industrial) | -40 °C to +85 °C | -40 °C to +85 °C (same) | -40 °C to +85 °C (same) | -40 °C to +85 °C (same) | -40 °C to +85 °C (same) | -40 °C to +85 °C (same) |
| Silicon Revision | Original (no T suffix) | Original | Revision T (errata fixes) | Revision T (typical) | PIC32MX2xx revision | Original |
Wichtigste Unterscheidungsmerkmale
- 50 MHz/83 DMIPS core at 64-pin TQFP price band (vs. PIC32MX130F128H-I/PT)
- On-chip CTMU + 13-channel 10-bit ADC for capacitive touch (vs. PIC32MX230F128H-50I/PT)
- Peripheral Pin Select (PPS) for flexible signal routing (vs. PIC32MX130F064H-I/PT)
Designhinweise
The PIC32MX130F128H-50I/PT requires a 2.5 V or 3.6 V supply and exposes separate VDD/AVDD/VSS/AVSS pin pairs. Place a 0.1 µF ceramic decoupling cap within 5 mm of every VDD/AVDD pin pair, and add a 10 µF bulk tantalum or ceramic on the main rail. A ferrite bead between VDD and AVDD prevents digital switching noise from coupling into the 10-bit ADC - critical for sensor-front-end designs that rely on clean ADC readings at 1 Msps.
Do not drive the I/O pins above VDD + 0.3 V even when the MCU is unpowered - latch-up risk on the CMOS I/O cells is well documented. Always use Peripheral Pin Select (PPS) to remap peripherals before configuring the pin - PPS unlock requires writing IOLOCK = 0 and using the sequence in DS60001168J section 12. Firmware must also clear IOLOCK after configuration to prevent runaway code from re-mapping peripherals inadvertently.
Route the 50 MHz crystal traces (RC14/OSC1 and RC15/OSC2) as short as possible - under 10 mm - with a ground guard ring on both sides, and place the load capacitors (typically 15-33 pF) within 2 mm of the MCU pins. For PMP-driven graphics interfaces, length-match the PMD[15:0] parallel data bus within 5 mm across all 16 lines to prevent skew at full CPU clock. Use a 4-layer PCB with continuous ground plane for best EMC performance.
Compliance-Informationen
RoHS compliant per Microchip product page. Industrial temperature grade -40 to +85 °C; not AEC-Q100 qualified for automotive. Choose PIC32MX1xx AEC-Q100 variants for automotive applications.
