10AX090U2F45E2LG vs 10AX090U3F45E2LG Vergleich
Detaillierter Direktvergleich von 10AX090U2F45E2LG von Intel und 10AX090U3F45E2LG von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 10AX090U2F45E2LG | 10AX090U3F45E2LG |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $3.647,50 | $6.900,00 |
| Family | Arria 10 GX | — |
| Logic Elements | 900,000 | — |
| Embedded Memory | 59,234,304 bits | — |
| User I/O Pins | 480 | — |
| Gehäuse | 1932-ball FCBGA | 1932-BBGA, FCBGA |
| Process Technology | 20nm | 20nm TSMC |
| Core Voltage | 0.9 V | — |
| Speed Grade | -2 | — |
| Temperature Range | 0C to 100C (E2 - extended) | — |
| Transceiver Data Rate | Up to 14.1 Gbps | — |
| PCI Express Hard IP | Gen3 (hardened) | — |
| Memory Controllers | Gen2 hard memory controllers | — |
| Configuration Method | Active serial, passive parallel, JTAG | Serial (active/passive) and parallel via Quartus Prime |
| RoHS-Status | Compliant | Compliant |
| MSL-Level | 4 (per JEDEC J-STD-020) | — |
| Lead-Free / Halogen-Free | Yes / [DATA_NEEDED: halogen-free status] | — |
| Series | — | Arria 10 GX |
| Logic Elements (LE) | — | 900,000 |
| Number of Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Embedded Memory Bits | — | 59,234,304 bits |
| Number of Transceivers | — | 48 transceiver macro channels (480 I/O references) |
| Maximum Transceiver Data Rate | — | [DATA_NEEDED: exact Gbps] |
| Hard Memory Controllers | — | Yes - DDR4, DDR3, QDR IV, RLDRAM 3 with hardened PHY |
| Hard PCIe Controllers | — | PCIe Gen3 x8 |
| Hard Ethernet MACs | — | 10GbE and 100GbE MACs |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count] |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Number of I/O Banks | — | [DATA_NEEDED: bank count] |
| Maximum User I/O Pins | — | 480 (per DigiKey listing) |
| Package Pin Pitch | — | [DATA_NEEDED: pitch] |
| Operating Temperature Grade | — | OTHER / Extended (per Partstack listing) |
| Development Tool | — | Intel Quartus Prime |