10CL016YM164C8G vs 10CL010YM164C8G Vergleich
Detaillierter Direktvergleich von 10CL016YM164C8G von Intel und 10CL010YM164C8G von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 10CL016YM164C8G | 10CL010YM164C8G |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $17,10 | $12,10 |
| Series | Cyclone 10 LP | — |
| Device Family | 10CL016 | — |
| Logic Elements (LE) | 15,408 | — |
| Adaptive Logic Modules (ALM) | 9,638 | — |
| Embedded Memory (bits) | 516,096 (504 kbit M9K blocks) | — |
| Embedded Multipliers (18x18) | 56 | — |
| User I/Os | 87 | — |
| PLLs | 2 (general-purpose) | 4 |
| Configuration Schemes | JTAG, AS (serial), PS (passive) | — |
| Betriebstemperatur | 0 °C to +85 °C (commercial) | — |
| Core Voltage (VCCINT) | 1.2 V | — |
| I/O Bank Voltage (VCCIO) | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| PLL Analog Voltage (VCCA_PLL) | 2.5 V | — |
| Gehäuse | 164-MBGA (M164), 8 x 8 mm, 0.5 mm pitch | 164-ball MBGA (Micro BGA, 8x8 mm) |
| Montageart | Surface Mount | Surface Mount (BGA) |
| MSL-Level | MSL-3 per JEDEC J-STD-020 | 3 (per JEDEC J-STD-020) |
| RoHS-Status | Compliant | Compliant |
| Speed Grade | C8 (commercial, 8 speed grade) | -8C (commercial, 8 speed grade) |
| Process Node | 60 nm low-power | TSMC 60 nm low-power |
| Design Software | Intel Quartus Prime Lite/Standard/Pro | — |
| Family | — | Cyclone 10 LP |
| Logic Elements | — | 10,320 |
| Embedded Memory | — | 414 Kbit (M9K blocks) |
| Embedded 18x18 Multipliers | — | 56 |
| Maximum User I/Os | — | 224 |
| Core Voltage | — | 1.0 V nominal (range 1.0 V to 1.1 V) |
| Betriebs-Sperrschichttemperatur | — | 0 C to +85 C (commercial) |
| Configuration Method | — | SRAM-based, JTAG/AS/AP/PS |
| Transceivers | — | None (general-purpose FPGA, no high-speed SERDES) |
| Hard PCIe Controller | — | 1x PCIe Gen1 (x1/x2 root port or endpoint) |
| Lead-Free | — | Yes |