10CL055YU484A7G vs 10CL055YU484C6G Vergleich
Detaillierter Direktvergleich von 10CL055YU484A7G von Intel und 10CL055YU484C6G von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 10CL055YU484A7G | 10CL055YU484C6G |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $124,30 | $24,38 |
| Series | Cyclone 10 LP | — |
| Logic Elements | 55,856 LE | — |
| Embedded Memory | 2,396,160 bits (2.29 Mbit) | — |
| Number of User I/Os | 321 I/O | — |
| Package Type | 484-UBGA (Ultra FineLine BGA) | — |
| Montageart | Surface Mount (SMD/SMT) | Surface Mount |
| Operating Supply Voltage (Core) | 1.2 V | — |
| I/O Standard Support | LVCMOS / LVTTL (3.3 V, 2.5 V, 1.8 V, 1.5 V) | — |
| Minimum Operating Temperature | -40 C | — |
| Maximum Operating Temperature | +85 C (industrial) | — |
| Speed Grade | A7 (standard performance) | 6 (commercial, slowest in family) |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | — |
| Embedded 18x18 Multipliers | Yes (DSP blocks) | 156 |
| PLL Count | [DATA_NEEDED: PLL count] | — |
| Configuration Method | Serial / JTAG / Active Serial (AS) | — |
| RoHS-Status | Compliant | Compliant |
| Process Technology | 60 nm | TSMC 60 nm low-power |
| Family | — | Cyclone 10 LP |
| Logic Elements (LE) | — | 55,856 |
| Embedded Memory Bits | — | 2,396,160 bits (approximately 2.5 Mb) |
| Maximum User I/Os | — | 321 |
| PLLs | — | 4 |
| Global Clocks | — | 20 |
| Core Voltage | — | 1.0 V (typical) |
| I/O Voltage Standards | — | LVDS, LVTTL, LVCMOS, SSTL, HSTL (1.2 V to 3.3 V) |
| Gehäuse | — | 484-pin UBGA (19 mm x 19 mm) |
| Betriebstemperatur | — | 0 C to +85 C (commercial, C suffix) |
| MSL-Level | — | [DATA_NEEDED: MSL level per JEDEC J-STD-020] |
| Lead-Free / Halogen-Free | — | Yes / [DATA_NEEDED: halogen-free status] |
| Configuration Modes | — | Active Serial (AS), Passive Serial (PS), JTAG |
| Transceivers | — | None (Cyclone 10 LP family does not include SERDES) |
| Hard Memory Controller | — | Yes (DDR/DDR2/DDR3/LPDDR2 via soft IP) |