10CL055YU484I7G vs 10CL055YU484C8G Vergleich
Detaillierter Direktvergleich von 10CL055YU484I7G von Altera und 10CL055YU484C8G von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 10CL055YU484I7G | 10CL055YU484C8G |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $35,10 | $63,80 |
| Family | Cyclone 10 LP | Cyclone 10 LP |
| Logic Elements | 55,856 | — |
| Embedded Memory Bits | 2,396,160 bits | — |
| M9K Memory Blocks | 260 | — |
| Maximum User I/Os | 321 | 321 |
| DSP Blocks (18x18 multipliers) | 156 | — |
| PLLs | 4 | — |
| Global Clock Networks | 20 | — |
| Process Technology | 60 nm low-power CMOS | 60 nm low-power |
| Gehäuse | 484-ball UBGA (Ultra FineLine BGA), 19 mm x 19 mm | 484-pin UBGA |
| Speed Grade | -7 (I7, industrial) | 8 |
| Betriebs-Sperrschichttemperatur | -40C to +100C | — |
| Core Voltage (VCCINT) | 1.0V (typical), 1.1V nominal | — |
| I/O Voltage (VCCIO) | 1.2V to 3.3V (bank-dependent) | — |
| Configuration Modes | JTAG, AS, PS, FPP | — |
| LVDS Data Rate | Up to 875 Mbps per channel | — |
| RoHS-Status | Compliant | — |
| MSL-Level | 3 (per JEDEC J-STD-020) | [DATA_NEEDED: MSL level] |
| Logic Elements (LE) | — | 55856 |
| Embedded Memory (bits) | — | 2396160 |
| Package Code | — | U484 |
| Betriebstemperaturbereich | — | 0C to 85C (Commercial) |
| Supply Voltage Core | — | 1.0 V (typical, see datasheet) |
| Configuration Mode | — | JTAG, AS, PS, FPP |
| Montageart | — | Surface Mount (BGA) |
| Lead-Free / RoHS | — | Yes / Compliant |
| Design Software | — | Intel Quartus Prime Lite / Standard |