10CL080YU484C6G vs 10CL055YU484C6G Vergleich
Detaillierter Direktvergleich von 10CL080YU484C6G von Intel und 10CL055YU484C6G von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 10CL080YU484C6G | 10CL055YU484C6G |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $34,75 | $24,38 |
| Family | Cyclone 10 LP | Cyclone 10 LP |
| Logic Elements (LE) | 81,264 | 55,856 |
| Embedded Memory Bits | 2,810,880 bits | 2,396,160 bits (approximately 2.5 Mb) |
| Embedded Memory Blocks | M9K (true dual-port) | — |
| 18x18 Hardware Multipliers | 244 | — |
| PLLs | 4 | 4 |
| Maximum User I/O | 289 | — |
| Gehäuse | 484-pin UBGA (UBGA-484), 19x19 mm, 0.8 mm pitch | 484-pin UBGA (19 mm x 19 mm) |
| Process Technology | 60 nm TSMC low-power | TSMC 60 nm low-power |
| Core Voltage | 1.0 V / 1.2 V (selectable) | 1.0 V (typical) |
| Betriebstemperatur | 0C to +85C (Commercial) | 0 C to +85 C (commercial, C suffix) |
| Speed Grade | -6 (C6) | 6 (commercial, slowest in family) |
| Configuration Modes | AS, PS, JTAG, FPP | Active Serial (AS), Passive Serial (PS), JTAG |
| External Memory Support | DDR2, DDR3, LPDDR2 | — |
| RoHS-Status | Compliant | Compliant |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Maximum User I/Os | — | 321 |
| Embedded 18x18 Multipliers | — | 156 |
| Global Clocks | — | 20 |
| I/O Voltage Standards | — | LVDS, LVTTL, LVCMOS, SSTL, HSTL (1.2 V to 3.3 V) |
| MSL-Level | — | [DATA_NEEDED: MSL level per JEDEC J-STD-020] |
| Lead-Free / Halogen-Free | — | Yes / [DATA_NEEDED: halogen-free status] |
| Transceivers | — | None (Cyclone 10 LP family does not include SERDES) |
| Hard Memory Controller | — | Yes (DDR/DDR2/DDR3/LPDDR2 via soft IP) |