5CSEBA2U19I7N vs 5CSEBA5U19C7N Vergleich
Detaillierter Direktvergleich von 5CSEBA2U19I7N von Intel und 5CSEBA5U19C7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 5CSEBA2U19I7N | 5CSEBA5U19C7N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $445,65 | $99,20 |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| Logic Elements | 25K | 85,000 |
| HPS | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Clock Frequency | 800 MHz | — |
| Embedded Memory | 1,400 Kbits | M10K + MLAB blocks, ~4,450 Kbits total |
| DSP Blocks (18x18 Multipliers) | 66 | — |
| User I/O Pins | 145 | — |
| LVDS Support | Up to 1.25 Gbps | — |
| Gehäuse | 484-UBGA (19x19 mm) | 484-UBGA (UBGAmobile, 19x19 mm) |
| Process Technology | 28 nm TSMC low-power | — |
| Betriebstemperatur | -40C to +100C (Industrial) | 0C to +85C (commercial, junction) |
| Voltage - Input (Max) | 1.1 V core | — |
| Peripherals | USB 2.0 OTG, Gigabit Ethernet, CAN, UART, SPI, I2C, NAND/NOR flash controllers | — |
| HPS-FPGA Interconnect | AXI bridges (3 master / 3 slave), FPGA-to-HPS SDRAM, DMA | — |
| RoHS-Status | Compliant | — |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 800 MHz per core |
| Speed Grade | — | -7 (standard) |
| Process Node | — | 28 nm low-power (TSMC) |
| Supply Voltage (Core) | — | 1.1 V typical |
| DSP Blocks | — | Variable-precision, 18x18 / 27x27 multipliers |
| HPS Peripherals | — | EMAC, USB 2.0 OTG, NAND, DDR3, SPI, QSPI, I2C, UART |
| RoHS / Pb-free | — | Yes |
| Configuration Memory | — | External (active serial via HPS or FPGA) |
| MSL-Level | — | 3 (per JEDEC J-STD-020, reflow 260C) |
| Block Pins (User I/O) | — | Approximately 66 user I/O pins |