5CSEBA2U23C7SN vs 5CSEBA2U19C7SN Vergleich
Detaillierter Direktvergleich von 5CSEBA2U23C7SN von Intel und 5CSEBA2U19C7SN von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 5CSEBA2U23C7SN | 5CSEBA2U19C7SN |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $13,73 | $40,33 |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE FPGA SoC |
| Logic Elements | 25K | 25,000 |
| Processor Core | Single ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum HPS Clock Frequency | 800 MHz | — |
| Gehäuse | 672-UBGA (23x23 mm) | 484-UBGA (19x19 mm) |
| Pin-Anzahl | 672 | — |
| Embedded Memory | 1.4 Mbits | — |
| Speed Grade | -7 | C7 (commercial) |
| Temperature Grade | Industrial | — |
| Process Technology | 28 nm low-power | TSMC 28 nm low-power |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Supply Voltage (Core) | [DATA_NEEDED: core VCC range] | — |
| Transceivers | Integrated high-speed transceivers | — |
| Hard Memory Controller | DDR3 (via HPS) | — |
| MSL-Level | 3 | 3 (per JEDEC J-STD-020) |
| RoHS-Status | Compliant | Compliant |
| Device Variant | — | 5CSEA2 (single-core ARM Cortex-A9) |
| Processor Hard Core | — | Single ARM Cortex-A9 MPCore with CoreSight |
| Maximum Processor Frequency | — | 800 MHz |
| User I/O Count | — | 161 (5CSEBA2 variant) |
| Betriebstemperatur | — | 0C to +85C (commercial, C7 suffix) |
| Memory Blocks | — | M10K + MLAB embedded RAM |
| DSP Blocks | — | Variable-precision DSP |
| HPS Memory Controller | — | DDR2, DDR3, LPDDR2, LPDDR |