5CSEBA4U23A7N vs 5CSEBA4U23I7LN Vergleich
Detaillierter Direktvergleich von 5CSEBA4U23A7N von Altera und 5CSEBA4U23I7LN von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 5CSEBA4U23A7N | 5CSEBA4U23I7LN |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $185,00 | $99,75 |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| Device Variant | 5CSEA4 | — |
| Logic Elements | 40 K | 40,000 |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Frequency | 700 MHz | — |
| Gehäuse | 672-pin UBGA (U23, 23x23 mm) | 672-pin UBGA (23x23 mm) |
| Process Node | 28 nm low power | — |
| DSP Blocks | Variable-precision DSP blocks (Cyclone V SE family feature) | — |
| Embedded Memory | M10K memory blocks (family feature) | [DATA_NEEDED: exact embedded memory size in bits] |
| Speed Grade | 7 | — |
| Betriebstemperatur | [DATA_NEEDED: industrial temp range explicit value] | -40C to +100C (Industrial) |
| Family Maximum Logic Elements | Up to 301 K LE | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| RoHS-Status | Compliant | Compliant |
| MSL-Level | [DATA_NEEDED: MSL rating] | 3 |
| HPS Peripherals | Gigabit Ethernet, USB 2.0, SATA, UART, SPI, I2C, CAN | — |
| FPGA-HPS Interface | ARM AMBA AXI coherence fabric | — |
| Processor Cores | — | Dual ARM Cortex-A9 MPCore |
| Processor Clock Speed | — | 925 MHz |
| Process Technology | — | 28nm TSMC low-power |
| DSP Blocks (18x18 multipliers) | — | [DATA_NEEDED: exact multiplier count] |
| Transceivers | — | 3.125 Gbps (per Cyclone V family) |
| External Memory Interface | — | DDR3, DDR2, LPDDR2 (controller integrated in HPS + soft IP in FPGA fabric) |
| Lead-Free | — | Yes |
| Halogenfrei | — | [DATA_NEEDED] |
| Number of GPIOs | — | [DATA_NEEDED: per device variant] |
| Number of PLLs | — | [DATA_NEEDED: per device variant] |