5CSEBA5U19I7N vs 5CSEBA5U19C7N Vergleich
Detaillierter Direktvergleich von 5CSEBA5U19I7N von Intel und 5CSEBA5U19C7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 5CSEBA5U19I7N | 5CSEBA5U19C7N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $119,85 | $99,20 |
| Product Type | SoC FPGA (System-on-Chip FPGA) | — |
| Series | Cyclone V SE | — |
| Logic Elements | 85,000 | 85,000 |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | Dual ARM Cortex-A9 MPCore with CoreSight |
| Core Frequency | 800 MHz (typical), up to 925 MHz | — |
| Process Technology | 28 nm TSMC low-power | — |
| Gehäuse | 484-pin UBG (UFBGA) 19x19 mm | 484-UBGA (UBGAmobile, 19x19 mm) |
| Versorgungsspannung | 1.1 V core | — |
| FPGA User I/O | 66 (per datasheet front-page snippet) | — |
| Embedded Memory | Approximately 4,450 Kbits | M10K + MLAB blocks, ~4,450 Kbits total |
| DSP Blocks | 87 variable-precision (18x18 multipliers) | Variable-precision, 18x18 / 27x27 multipliers |
| Transceivers | Up to 5 Gbps (Cyclone V SE feature) | — |
| HPS Peripherals | USB 2.0 OTG, EMAC, CAN, SPI, I2C, UART, SD/MMC, NAND | EMAC, USB 2.0 OTG, NAND, DDR3, SPI, QSPI, I2C, UART |
| Betriebstemperatur | -40C to +100C (Industrial grade, suffix I) | 0C to +85C (commercial, junction) |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| MSL-Level | [DATA_NEEDED: MSL level] | 3 (per JEDEC J-STD-020, reflow 260C) |
| RoHS-Status | Compliant (per Heisener listing and product family) | — |
| Family | — | Cyclone V SE SoC FPGA |
| HPS Maximum Frequency | — | 800 MHz per core |
| Speed Grade | — | -7 (standard) |
| Process Node | — | 28 nm low-power (TSMC) |
| Supply Voltage (Core) | — | 1.1 V typical |
| RoHS / Pb-free | — | Yes |
| Configuration Memory | — | External (active serial via HPS or FPGA) |
| Block Pins (User I/O) | — | Approximately 66 user I/O pins |