5CSEBA6U19I7N vs 5CSEBA5U19I7N Vergleich
Detaillierter Direktvergleich von 5CSEBA6U19I7N von Intel und 5CSEBA5U19I7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
5CSEBA6U19I7N - Cyclone V SE SoC FPGA, 110K LE, Dual ARM Cortex-A9 800MHz | Intel
5CSEBA6U19I7N ✓ Aktiv
Spezifikationsvergleich
| Parameter | 5CSEBA6U19I7N | 5CSEBA5U19I7N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $142,75 | $119,85 |
| Family | Cyclone V SE SoC FPGA | — |
| Series | 5CSEBA6 | Cyclone V SE |
| Device Variant | 5CSEA6 (U19 package, 110K LE) | — |
| Logic Elements | 110,000 | 85,000 |
| Hard Processor System | Dual-core ARM Cortex-A9 MPCore | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | 800 MHz | — |
| Embedded Memory | 4.45 Mbits (M10K + MLAB) | Approximately 4,450 Kbits |
| Hard Memory Controller | DDR3, DDR3L, LPDDR2 | — |
| Transceivers | Up to 9 channels, 3.125 Gbps | Up to 5 Gbps (Cyclone V SE feature) |
| DSP Blocks | 112 (18x18 multipliers) | 87 variable-precision (18x18 multipliers) |
| PLLs | 6 (FPGA) + 3 (HPS) | — |
| User I/O Banks | 8 | — |
| Maximum User I/O | 288 (package-dependent) | — |
| Gehäuse | 484-pin UBGAFBGA (UBGA-484, 19x19 mm) | 484-pin UBG (UFBGA) 19x19 mm |
| Betriebstemperatur | -40C to +100C (Industrial) | -40C to +100C (Industrial grade, suffix I) |
| Process Technology | TSMC 28 nm low-power | 28 nm TSMC low-power |
| Versorgungsspannung | Multi-rail (1.1 V core, 1.5/1.8/2.5/3.0/3.3 V I/O) | 1.1 V core |
| Configuration Modes | JTAG, Active Serial (AS), Passive Serial (PS), Fast Passive Parallel (FPP) | — |
| RoHS-Status | Compliant | Compliant (per Heisener listing and product family) |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Product Type | — | SoC FPGA (System-on-Chip FPGA) |
| Core Frequency | — | 800 MHz (typical), up to 925 MHz |
| FPGA User I/O | — | 66 (per datasheet front-page snippet) |
| HPS Peripherals | — | USB 2.0 OTG, EMAC, CAN, SPI, I2C, UART, SD/MMC, NAND |
| MSL-Level | — | [DATA_NEEDED: MSL level] |