5CSXFC5C6U23C7N vs 5CSXFC6C6U23C8N Vergleich
Detaillierter Direktvergleich von 5CSXFC5C6U23C7N von Intel und 5CSXFC6C6U23C8N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
5CSXFC6C6U23C8N - Cyclone V SX SoC FPGA, 110K LE, ARM Cortex-A9 | Intel
5CSXFC6C6U23C8N ✓ AktivSpezifikationsvergleich
| Parameter | 5CSXFC5C6U23C7N | 5CSXFC6C6U23C8N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $348,00 | $445,00 |
| Series | Cyclone V SX | Cyclone V SX |
| Family | Cyclone V SoC FPGA | Cyclone V SX (SoC FPGA) |
| Logic Elements | 85,000 | 110,000 |
| Embedded Memory | 4,450 Kbits | M10K blocks (total Kbits [DATA_NEEDED: total embedded memory Kbits]) |
| DSP Blocks | 87 | Variable-precision DSP (number not specified in retrieved data) |
| Fractional PLLs | 8 | — |
| HPS Processor | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Frequency | 800 MHz | — |
| User I/Os | 145 | — |
| Speed Grade | C6 | C8 (commercial speed grade 8) |
| Betriebstemperatur | 0C to +85C (commercial) | -40C to +100C (industrial grade, code C) |
| Core Voltage | 1.1 V | 1.1 V |
| Process Technology | 28 nm TSMC | 28 nm low-power (TSMC) |
| Gehäuse | 672-UBGA (UFBGA) 23x23 mm | 672-pin UFBGA (UBGA), 23x23 mm |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS-Status | Compliant | Compliant |
| Architecture | — | MCU + FPGA (Hard Processor System + FPGA fabric) |
| Hard Processor System (HPS) | — | Dual-core ARM Cortex-A9 MPCore with CoreSight |
| Processor Maximum Frequency | — | 600 MHz |
| HPS L1 Cache | — | 32 KB instruction + 32 KB data per core |
| HPS L2 Cache | — | 512 KB shared |
| Transceivers | — | Up to 3.125 Gbps integrated transceivers |
| Maximum User I/O | — | 145 user I/O (per DigChip summary; full count per package [DATA_NEEDED: package pinout max user I/O]) |
| Memory Controller | — | Hard controller supporting DDR2, DDR3, LPDDR2 |
| MSL-Level | — | 3 (per JEDEC J-STD-020, typical for large BGA) |
| Lead-Free / Halogen-Free | — | Yes (lead-free BGA; halogen status [DATA_NEEDED: halogen-free yes/no]) |
| Lifecycle | — | Active (Cyclone V family in production) |