5M160ZE64C5N vs 5M1270ZF256C5N Vergleich
Detaillierter Direktvergleich von 5M160ZE64C5N von Altera und 5M1270ZF256C5N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 5M160ZE64C5N | 5M1270ZF256C5N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $4,95 | $21,40 |
| Series | MAX V | 5M1270Z |
| Device Family | MAX V (5M160Z) | — |
| Logic Elements (LE) | 160 | 1270 |
| Macrocells | 128 | — |
| User I/O Pins | 54 | — |
| Maximum Operating Frequency (fMAX) | 118.3 MHz | — |
| Pin-to-Pin Logic Delay (tPD) | 1.4 ns (per datasheet) | — |
| Configuration Memory | Non-volatile Flash | 8 Kbits User Flash Memory (UFM), non-volatile |
| Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Bank Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| User Flash Memory | 8 Kbits | — |
| Gehäuse | 64-pin EQFP (E64) with exposed pad | 256-ball FBGA (FineLine BGA) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0°C to +85°C (commercial) | 0 C to +85 C (Commercial) |
| Programming Interface | JTAG (IEEE 1149.1) / In-system | JTAG (IEEE 1149.1), ByteBlaster |
| RoHS-Status | Compliant | Compliant |
| MSL-Level | 3 | — |
| Family | — | MAX V |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Macro Cells | — | 980 |
| User I/Os (Max) | — | 212 |
| Maximum Operating Frequency | — | 201.1 MHz |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltages (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (5.0 V tolerant inputs) |
| Propagation Delay (tPD) | — | [DATA_NEEDED: tPD max] |
| Internal Oscillator | — | Yes (on-chip, supports user logic) |
| Process Node | — | 0.30 µm |