5M160ZE64C5N vs 5M160ZE64I5N Vergleich
Detaillierter Direktvergleich von 5M160ZE64C5N von Altera und 5M160ZE64I5N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 5M160ZE64C5N | 5M160ZE64I5N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $4,95 | $4,13 |
| Series | MAX V | — |
| Device Family | MAX V (5M160Z) | MAX V |
| Logic Elements (LE) | 160 | — |
| Macrocells | 128 | 128 |
| User I/O Pins | 54 | — |
| Maximum Operating Frequency (fMAX) | 118.3 MHz | — |
| Pin-to-Pin Logic Delay (tPD) | 1.4 ns (per datasheet) | 7.5 ns |
| Configuration Memory | Non-volatile Flash | — |
| Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Bank Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| User Flash Memory | 8 Kbits | 4.0 Kbits |
| Gehäuse | 64-pin EQFP (E64) with exposed pad | 64-pin EQFP (Exposed Pad) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0°C to +85°C (commercial) | -40C to +100C (Industrial) |
| Programming Interface | JTAG (IEEE 1149.1) / In-system | — |
| RoHS-Status | Compliant | Compliant |
| MSL-Level | 3 | — |
| Logic Elements (LEs) | — | 160 |
| Maximum User I/O Pins | — | 79 |
| Logic Array Blocks (LABs) | — | 4 |
| Supply Voltage - Core | — | 3.3 V or 2.5 V |
| I/O Bank Voltages | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| JTAG Support | — | Yes (IEEE 1149.1, TMS/TDI/TDO/TCK) |
| Differential I/O | — | LVDS, RSDS, mini-LVDS, LVPECL (emulated) |
| Configuration | — | Non-volatile on-chip flash, instant-on |