5M160ZE64C5N vs 5M160ZT100C5N Vergleich
Detaillierter Direktvergleich von 5M160ZE64C5N von Altera und 5M160ZT100C5N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 5M160ZE64C5N | 5M160ZT100C5N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $4,95 | $4,75 |
| Series | MAX V | MAX V |
| Device Family | MAX V (5M160Z) | MAX V CPLD |
| Logic Elements (LE) | 160 | — |
| Macrocells | 128 | — |
| User I/O Pins | 54 | — |
| Maximum Operating Frequency (fMAX) | 118.3 MHz | — |
| Pin-to-Pin Logic Delay (tPD) | 1.4 ns (per datasheet) | — |
| Configuration Memory | Non-volatile Flash | — |
| Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Bank Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| User Flash Memory | 8 Kbits | — |
| Gehäuse | 64-pin EQFP (E64) with exposed pad | TQFP-100 |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0°C to +85°C (commercial) | 0 °C to +85 °C (commercial) |
| Programming Interface | JTAG (IEEE 1149.1) / In-system | JTAG (IEEE 1149.1) - in-system |
| RoHS-Status | Compliant | Compliant |
| MSL-Level | 3 | 3 |
| Macro Cells | — | 128 |
| Logic Elements (LEs) | — | 160 |
| User I/Os | — | 79 |
| Number of Logic Array Blocks (LABs) | — | 8 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Operating Frequency | — | 152 MHz (typical, internal) |
| User Flash Memory (UFM) | — | 8 Kbits |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 1.5 V to 3.3 V |
| Lead-Free | — | Yes |