5M40ZM64C4N vs 5M40ZM64C5N Vergleich
Detaillierter Direktvergleich von 5M40ZM64C4N von Altera und 5M40ZM64C5N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 5M40ZM64C4N | 5M40ZM64C5N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,48 | $1,45 |
| Family | MAX V | MAX V |
| Logic Elements | 40 | — |
| Macro Cells | 32 | — |
| Number of I/O Pins | 30 (max user I/O) | — |
| Number of Logic Array Blocks | 2 LABs (16 macrocells each) | — |
| Core Voltage VCCINT | 1.8 V (1.71 V to 1.89 V) | — |
| I/O Voltage VCCIO | 1.2 V to 3.3 V (multi-voltage) | — |
| Maximum Internal Frequency | 184.1 MHz | 118.3 MHz |
| Pin-to-Pin Logic Delay (tPD) | 7.5 ns | 7.5 ns |
| Propagation Delay (max) | 7.5 ns | — |
| Betriebstemperatur | 0 °C to +85 °C (commercial) | — |
| Gehäuse | 64-MBGA (Micro FineLine BGA), 4.5 x 4.5 mm | 64-ball MBGA, 5 mm × 5 mm |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Configuration Memory | Flash (non-volatile, instant-on) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) ISP |
| RoHS-Status | Compliant | Compliant |
| MSL-Level | [DATA_NEEDED: MSL rating] | — |
| Device Logic Elements | — | 40 |
| Macrocells | — | 32 |
| Supply Voltage - Core (VCCINT) | — | 1.8 V |
| I/O Voltage Banks | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V tolerant |
| Programmable I/O Pins | — | 30 (approximate, per MAX V 5M40Z datasheet family) |
| User Flash Memory | — | 8 Kbits |
| Configuration Method | — | Non-volatile flash, instant-on, single-chip |
| Standby Current (ICCSTBY) | — | 55 µA typical |
| Betriebstemperaturbereich | — | 0 °C to +85 °C (commercial) |