A3938SLDTR-T vs A3938SLDT Vergleich
Detaillierter Direktvergleich von A3938SLDTR-T von Allegro MicroSystems und A3938SLDT von Allegro MicroSystems. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Allegro MicroSystems
A3938SLDTR-T - 3-Phase BLDC MOSFET Controller, 50V | Allegro
A3938SLDTR-T ✓ AktivSpezifikationsvergleich
| Parameter | A3938SLDTR-T | A3938SLDT |
|---|---|---|
| Marke | Allegro MicroSystems | Allegro MicroSystems |
| Kategorie | Motor Drivers | Motor Drivers |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $4,05 | $3,95 |
| Funktion | Three-phase BLDC motor controller / MOSFET gate driver | Three-Phase BLDC Motor Controller / MOSFET Gate Driver |
| Motor Supply Voltage | 18 V to 50 V | Up to 50 V |
| Topologie | Three-phase, 6-step PWM / synchronous rectification | — |
| Anzahl der Ausgänge | 3 half-bridge gate drive channels | — |
| Ausgangskonfiguration | Pre-driver for N-channel MOSFETs (high-side + low-side) | Six N-channel MOSFET gate drivers (3 high-side + 3 low-side) |
| High-Side Drive | Bootstrap with internal bootstrap diode | Bootstrapped with integrated bootstrap management |
| Synchrongleichrichtung | Yes (low-side) | — |
| Dead Time Adjustment | Adjustable (external resistor) | — |
| MOSFET Protection | Cross-conduction / shoot-through protection | — |
| PWM Input | Logic-level compatible | — |
| Gehäuse | 38-pin TSSOP (LD) | 38-pin TSSOP with exposed thermal pad (LD suffix) |
| Montageart | Surface Mount | Surface Mount |
| Packaging | Tape & Reel (TR) | — |
| Betriebstemperatur | -20C to +85C (industrial range per datasheet) | -40C to +85C (TB075 suffix SLD) [DATA_NEEDED: confirm exact temp grade from datasheet] |
| RoHS-Status | Compliant (per Alldatasheet listing) | Compliant (per distributor listings) |
| Motor Type | — | Brushless DC (BLDC), three-phase |
| Logic Input Compatibility | — | 3.3 V / 5 V CMOS logic |
| Dead Time | — | Programmable (per datasheet) |
| Undervoltage Lockout (UVLO) | — | Logic and gate-drive rails |
| Thermisches Abschalten | — | Yes (internal) |
| MSL-Level | — | [DATA_NEEDED: confirm from datasheet] |
| PWM Frequency | — | Up to [DATA_NEEDED] kHz (verify in datasheet) |