A54SX72A-CQ208B vs A54SX72A-1CQ208B Vergleich
Detaillierter Direktvergleich von A54SX72A-CQ208B von Microchip Technology und A54SX72A-1CQ208B von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
A54SX72A-CQ208B - 108K-Gate Antifuse FPGA, CQFP-208 | Microchip
A54SX72A-CQ208B ✓ AktivMicrochip Technology
A54SX72A-1CQ208B - 108K-Gate Antifuse FPGA 208-CQFP | Microchip
A54SX72A-1CQ208B ✓ AktivSpezifikationsvergleich
| Parameter | A54SX72A-CQ208B | A54SX72A-1CQ208B |
|---|---|---|
| Marke | Microchip Technology | Microchip Technology |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $0,00 |
| Family | SX-A (Actel antifuse FPGA) | SX-A (Antifuse FPGA) |
| System Gates | 108,000 (72K gate designation) | 108000 gates |
| Maximum Frequency | 217 MHz | — |
| Number of Registers | 4024 | — |
| Dedicated Flip-Flops | 2012 | — |
| User I/O | 171 | 171 |
| Versorgungsspannung | 2.5 V | — |
| Supply Voltage Range | 2.25 V to 2.75 V | — |
| Process Technology | 0.25 um CMOS | 0.22 um / 0.25 um CMOS antifuse |
| Programming Technology | Antifuse (one-time programmable) | — |
| Betriebstemperatur | -55C to +125C | -55C to +125C (military B grade) |
| Gehäuse | 208-BFCQFP with Tie Bar (CQFP-208, ceramic) | 208-BFCQFP with tie bar (ceramic, 75x75 mm) |
| Montageart | Surface Mount | Surface Mount |
| Packaging | Tray, single unit quantity | — |
| Clock Networks | CLKA, CLKB, quadrant clock (QCLK) | — |
| Configuration | No external configuration memory required (OTP) | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Logic Blocks (LABs/CLBs) | — | 6036 |
| I/O Voltage Range | — | 2.25 V to 5.25 V |
| Speed Grade | — | -1 (fastest SX72A bin) |
| Maximum Toggle Rate (family) | — | up to 217 MHz |
| Global/Quadrant Clocks | — | CLKA, CLKB, QCLK quadrant clock networks |
| Program Type | — | One-Time Programmable (antifuse) |
| Package Hermeticity | — | Hermetic ceramic |
| Design Security | — | Configuration not readable (antifuse OTP) |
| Supply Voltage (core) | — | [DATA_NEEDED: core supply voltage] |