A54SX72A-CQ256 vs A54SX72A-1CQ256B Vergleich
Detaillierter Direktvergleich von A54SX72A-CQ256 von Microchip Technology und A54SX72A-1CQ256B von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
A54SX72A-CQ256 - 108K Gate Antifuse FPGA, 203 I/O | Microchip
A54SX72A-CQ256 ✓ AktivMicrochip Technology
A54SX72A-1CQ256B - 108K-Gate Antifuse FPGA | Microchip
A54SX72A-1CQ256B ✓ AktivSpezifikationsvergleich
| Parameter | A54SX72A-CQ256 | A54SX72A-1CQ256B |
|---|---|---|
| Marke | Microchip Technology | Microchip Technology |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $196,00 | $0,00 |
| Family | SX-A (Actel/Microsemi antifuse FPGA) | SX-A (Antifuse FPGA) |
| System Gates | 108000 gates | 108,000 |
| Typical Gates | 72000 gates | — |
| Logic Modules | 4024 modules | — |
| User I/O | 203 | — |
| Maximum System Frequency | 217 MHz | — |
| Process Technology | 0.22 um / 0.25 um CMOS antifuse | — |
| Programming Type | One-time programmable (antifuse) | — |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Support | 2.5 V, 3.3 V, 5 V | — |
| I/O Standards | TTL, LVTTL, LVCMOS2, 3.3 V PCI, 5 V PCI | — |
| Quadrant Clock Inputs | 4 (CLKA, CLKB, CLKC, CLKD) | — |
| Gehäuse | 256-pin CQFP (BFCQFP with tie bar), ceramic | 256-BFCQFP with Tie Bar (CQ256) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Logic Array Blocks (LABs) / CLBs | — | 6,036 |
| Programmable I/O | — | 203 |
| Supply Voltage Range | — | 2.25 V to 5.25 V |
| Lead Pitch | — | 0.5 mm |
| Programming Technology | — | Antifuse (one-time programmable, non-volatile) |
| Clocking Resources | — | CLKA, CLKB and quadrant clock (QCLK) networks |
| Configuration | — | Self-contained (no external configuration device required) |
| Speed Grade | — | -1 |
| MSL-Level | — | [DATA_NEEDED: moisture sensitivity level] |
| Ruhestrom | — | [DATA_NEEDED: quiescent current] |