ADC1112D125HN-C18 vs ADC1212D125HN-C1 Vergleich
Detaillierter Direktvergleich von ADC1112D125HN-C18 von Renesas Electronics und ADC1212D125HN-C1 von Renesas Electronics. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Renesas Electronics
ADC1112D125HN-C18 - Dual 11-bit 125MSPS ADC, LVDS/CMOS | Renesas
ADC1112D125HN-C18 ✓ AktivRenesas Electronics
ADC1212D125HN-C1 - Dual 12-bit 125MSPS ADC, LVDS/CMOS | Renesas
ADC1212D125HN-C1 ✓ AktivSpezifikationsvergleich
| Parameter | ADC1112D125HN-C18 | ADC1212D125HN-C1 |
|---|---|---|
| Marke | Renesas Electronics | Renesas Electronics |
| Kategorie | ADC/DAC | ADC/DAC |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,48 | $20,75 |
| Auflösung | 11-bit | 12 bit |
| Number of Channels | 2 (dual, simultaneous sampling) | 2 (dual) |
| Sample Rate (Max) | 125 Msps | — |
| Analog Supply Voltage (AVDD) | 3.0 V to 3.6 V | — |
| Digital I/O Supply (OVDD) | 1.8 V to 3.3 V | — |
| Output Interface | CMOS or LVDS DDR (selectable) | — |
| Input Type | Single-ended analog inputs (per channel) | Differential analog |
| Reference | Internal programmable (0-6 dB in 1 dB steps) or external | — |
| Control Interface | SPI (3-wire, mode configuration) | — |
| Power-Down Mode | Yes, per-channel via SPI | — |
| Gehäuse | HVQFN-64 (8x8 mm with exposed thermal pad) | 64-pin HVQFN (9 x 9 mm, SOT804-3) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperaturbereich | -40 C to +85 C | [DATA_NEEDED: operating temperature range] |
| MSL-Level | 3 (168 hours) | — |
| RoHS-Status | Compliant | Compliant |
| Maximum Sample Rate | — | 125 Msps |
| Architecture | — | Pipelined |
| Available Speed Grades | — | 65 / 80 / 105 / 125 Msps |
| Digital Output Interface | — | CMOS or LVDS DDR |
| Analog Supply Voltage | — | 1.8 V |
| Digital Supply Voltage | — | 3.3 V |
| Package Height | — | 0.85 mm |
| Conversion Topology | — | Pipelined with proprietary error correction |