ADC12040CIVY vs ADC08B200CIVS Vergleich
Detaillierter Direktvergleich von ADC12040CIVY von Texas Instruments und ADC08B200CIVS von Texas Instruments. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Texas Instruments
ADC12040CIVY - 12-Bit 40MSPS Pipelined ADC | Texas Instruments
ADC12040CIVY ✓ Aktiv
Spezifikationsvergleich
| Parameter | ADC12040CIVY | ADC08B200CIVS |
|---|---|---|
| Marke | Texas Instruments | Texas Instruments |
| Kategorie | ADC/DAC | ADC/DAC |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $5,52 | $8,25 |
| Auflösung | 12 bit | 8 bits |
| Abtastrate | 40 MSPS (min 40 MSPS over temperature) | — |
| Number of Channels | 1 input | — |
| Architecture | Pipelined | Pipeline / Flash with internal track-and-hold |
| Versorgungsspannung | +5V ±5% (single supply) | — |
| Power Consumption | 340 mW (typ) at 40 MHz | — |
| Differential Non-Linearity (DNL) | ±0.4 LSB (typ) | — |
| Signal-to-Noise Ratio (SNR) | 69 dB (typ) at fIN = 10 MHz | — |
| Effective Number of Bits (ENOB) | 11.2 bits (typ) at fIN = 10 MHz | — |
| Input Type | Differential (single-ended capable) | Single-ended / Differential (analog front end) |
| Reference Type | External, with internal buffer | — |
| Digital Output Interface | Parallel, CMOS, straight binary | — |
| Digital Output Logic Levels | 2.35V to 5V compatible | — |
| Power Down Mode | On-chip (low quiescent between conversions) | — |
| Betriebstemperaturbereich | -40C to +85C (industrial) | -40C to +105C (industrial) |
| Gehäuse | 32-LQFP (NEY) 7x7 mm | 48-pin TQFP (7x7 mm) |
| Montageart | Surface Mount | Surface Mount |
| Pin Family Compatibility | Pin compatible with ADC12010, ADC12020, ADC12L063, ADC12L066 | — |
| RoHS-Status | Compliant (NOPB suffix variants only; check exact suffix) | [DATA_NEEDED: RoHS status] |
| Sample Rate | — | 200 MSPS |
| Number of Input Channels | — | 1 |
| Capture Buffer Depth | — | 1024 samples (1K) |
| Digital Output Format | — | Straight binary, parallel CMOS/TTL |
| Analog Supply Voltage | — | 3.0 V typical |
| Output Supply Voltage (VDR) | — | 2.7 V to 3.3 V |
| Input Clock Feature | — | Programmable duty-cycle stabilizer |
| MSL-Level | — | [DATA_NEEDED: MSL level] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Automotive Grade | — | AEC-Q100 Grade 2 (ADC08B200Q variant only, not CIVS) |