ADS6144IRHBR vs ADS6143IRHBR Vergleich
Detaillierter Direktvergleich von ADS6144IRHBR von Texas Instruments und ADS6143IRHBR von Texas Instruments. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Texas Instruments
ADS6144IRHBR - 14-Bit 105MSPS Low-Power ADC | Texas Instruments
ADS6144IRHBR ✓ AktivTexas Instruments
ADS6143IRHBR - 14-Bit 80MSPS Low-Power ADC | Texas Instruments
ADS6143IRHBR ✓ AktivSpezifikationsvergleich
| Parameter | ADS6144IRHBR | ADS6143IRHBR |
|---|---|---|
| Marke | Texas Instruments | Texas Instruments |
| Kategorie | ADC/DAC | ADC/DAC |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $18,20 | $20,90 |
| Auflösung | 14 bit | 14 bit |
| Number of Channels | 1 | — |
| Sampling Rate (Maximum) | 105 MSPS | — |
| Architecture | Pipelined | Pipelined |
| Input Type | Differential (analog buffered) | Differential |
| Full-Scale Input Range | 1.0 Vpp to 1.5 Vpp (programmable) | — |
| Analog Input Bandwidth | [DATA_NEEDED: input bandwidth MHz] | — |
| SNR (9.9 MHz input) | [DATA_NEEDED: SNR dBFS at 9.9 MHz] | — |
| SFDR (70 MHz input) | [DATA_NEEDED: SFDR dBFS at 70 MHz] | — |
| Power Dissipation | [DATA_NEEDED: power at 105 MSPS mW] | — |
| Output Interface | Parallel CMOS / DDR LVDS (selectable) | — |
| Output Data Format | Offset Binary, Twos Complement, or Gray Code | — |
| Reference | Internal or External | — |
| Betriebstemperaturbereich | -40 C to +85 C (Industrial) | -40C to +85C (Industrial) |
| Supply Voltage (AVDD) | [DATA_NEEDED: AVDD V] | — |
| Gehäuse | 32-VQFN (RHB) 5x5 mm with exposed thermal pad | 32-pin VQFN (RHB), 5x5 mm with exposed pad |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | 2 (per JEDEC J-STD-020) | [DATA_NEEDED: MSL rating] |
| RoHS-Status | Compliant | Compliant |
| Wake-up / Sleep Mode | Yes (power-down pin) | — |
| Number of Input Channels | — | 1 |
| Sampling Rate (max) | — | 80 MSPS |
| Digital Output Interface | — | Parallel CMOS or DDR LVDS (selectable) |
| Analog Supply Voltage | — | 3.3 V |
| Digital Supply Voltage | — | 1.8 V (LVDS mode) / 3.3 V (CMOS mode) |
| Integral Nonlinearity (INL) | — | 0.0244% (typ) |
| SNR at 70 MHz Input | — | 73 dBFS (typ) |
| SFDR | — | 85 dBc (typ) |
| Integral Aperture Delay | — | [DATA_NEEDED: aperture delay value] |
| Power Consumption | — | [DATA_NEEDED: power dissipation value] |
| Programmable Gain | — | 0 to 6 dB in 1-dB steps (4-bit) |
| Lead-Free | — | Yes |