ADS62P15IRGC25 vs ADS62P48IRGC25 Vergleich

Detaillierter Direktvergleich von ADS62P15IRGC25 von Texas Instruments und ADS62P48IRGC25 von Texas Instruments. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Texas Instruments
ADS62P15IRGC25 ADS62P15IRGC25 - Dual 11-Bit 125MSPS ADC | Texas Instruments

ADS62P15IRGC25 - Dual 11-Bit 125MSPS ADC | Texas Instruments

ADS62P15IRGC25 ✓ Aktiv
Texas Instruments
ADS62P48IRGC25 ADS62P48IRGC25 - Dual 14-Bit 210MSPS ADC | Texas Instruments

ADS62P48IRGC25 - Dual 14-Bit 210MSPS ADC | Texas Instruments

ADS62P48IRGC25 ✓ Aktiv

Spezifikationsvergleich

Parameter ADS62P15IRGC25 ADS62P48IRGC25
Marke Texas Instruments Texas Instruments
Kategorie ADC/DAC ADC/DAC
Lebenszyklusstatus Aktiv Aktiv
Lagerstatus In Stock In Stock
Stückpreis (USD) $30,00 $49,20
Auflösung 11 bit 14 bit
Number of Channels 2 (dual, simultaneous sampling) 2 (Dual)
Sampling Rate (max) 125 MSPS per channel —
Architecture Pipelined Pipelined
Input Type Differential analog inputs Differential analog inputs
Output Interface Parallel CMOS or DDR LVDS (selectable) DDR LVDS / Parallel CMOS (selectable)
Reference Internal (external reference supported) —
Gehäuse 64-VQFN (9x9 mm, RGC) with thermal pad —
Betriebstemperaturbereich -40 C to +85 C (industrial) -40 C to +85 C (Industrial)
Supply Voltage (AVDD) 3.3 V (typical) —
Supply Voltage (DRVDD) 1.8 V to 3.3 V (interface-dependent) —
SNR (typical) [DATA_NEEDED: SNR dBFS] —
SFDR (typical) [DATA_NEEDED: SFDR dBc] —
ENOB (typical) [DATA_NEEDED: ENOB bits] —
Input Bandwidth [DATA_NEEDED: analog input bandwidth MHz] —
Power Dissipation [DATA_NEEDED: power per channel mW] —
Configuration Interface Serial (SPI-compatible) —
Montageart Surface Mount Surface Mount
RoHS-Status Compliant Compliant
MSL-Level 3 3
Sample Rate (max) — 210 MSPS
Analog Supply Voltage — 1.8 V
Digital Supply Voltage — 3.3 V
Gehäuse / Bauform — 64-VQFN (RGC) 9x9 mm (HVQCCN)
Pin-Anzahl — 64
Lead Free — Yes
Input Clock Type — LVDS differential clock
Internal Dither — Yes (programmable)
Programmable Gain — Yes (improves SFDR at lower FS inputs)

Datenblätter & Ressourcen

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