ATMEGA128-16MUR vs ATMEGA128L-8MUR Vergleich
Detaillierter Direktvergleich von ATMEGA128-16MUR von Microchip Technology und ATMEGA128L-8MUR von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
ATMEGA128-16MUR - 8-bit AVR MCU 128KB 16MHz | Microchip
ATMEGA128-16MUR ✓ AktivMicrochip Technology
ATMEGA128L-8MUR - 8-bit AVR MCU 128KB 8MHz 64-QFN | Microchip
ATMEGA128L-8MUR ✓ AktivSpezifikationsvergleich
| Parameter | ATMEGA128-16MUR | ATMEGA128L-8MUR |
|---|---|---|
| Marke | Microchip Technology | Microchip Technology |
| Kategorie | Microcontrollers | Microcontrollers |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $8,40 | $11,75 |
| Core Architecture | 8-bit AVR RISC | — |
| Core Size | 8-bit | 8-Bit |
| Maximale Taktfrequenz | 16 MHz | — |
| Flash Memory | 128 KB (64K x 16) | 128KB (64K x 16) In-System Programmable |
| SRAM | 4 KB | 4KB |
| EEPROM | 4 KB | 4KB |
| Supply Voltage Range | 4.5 V to 5.5 V | 2.7 V to 5.5 V |
| ADC Channels | 8 channels | — |
| ADC Resolution | 10-bit | 10-bit, 8 channels |
| Timers/Counters | 2 x 8-bit, 2 x 16-bit | — |
| PWM Channels | Yes (hardware PWM) | — |
| Communication Interfaces | 2 x USART, SPI, TWI (I2C) | 2x USART, SPI, TWI (I2C) |
| JTAG Debug | Yes (on-chip debug and boundary scan) | — |
| I/O Pins | 53 | — |
| External Memory Support | Up to 64 KB | — |
| Sleep Modes | 6 | — |
| Gehäuse | 64-VFQFN (9x9 mm) exposed pad | 64-VFQFN Exposed Pad (MLF), 9x9 mm |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status] |
| Throughput | Up to 16 MIPS | — |
| Core Processor | — | AVR 8-bit RISC |
| Speed (Max Clock) | — | 8 MHz |
| Number of I/O | — | 53 |
| Timers | — | Two 8-bit, Two 16-bit |
| Debug Interface | — | JTAG (on-chip debug, boundary scan) |
| Betriebstemperatur | — | [DATA_NEEDED: operating temperature range] |
| Programmability | — | In-System Programmable (ISP), boot loader self-programming |
| Lifecycle Stage | — | ACTIVE |