ATMEGA128L-8MN vs ATMEGA64L-8MUR Vergleich
Detaillierter Direktvergleich von ATMEGA128L-8MN von Microchip Technology und ATMEGA64L-8MUR von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
ATMEGA128L-8MN - 8MHz AVR MCU 128KB Flash 64-QFN | Microchip
ATMEGA128L-8MN ✓ Aktiv
Spezifikationsvergleich
| Parameter | ATMEGA128L-8MN | ATMEGA64L-8MUR |
|---|---|---|
| Marke | Microchip Technology | Microchip Technology |
| Kategorie | Microcontrollers | Microcontrollers |
| Lebenszyklusstatus | Aktiv | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,68 | $5,16 |
| Core Architecture | 8-bit AVR RISC | — |
| Program Memory Size | 128 KB (64K x 16) Flash | 64 KB (32K x 16) FLASH |
| SRAM Size | 4 KB (4K x 8) | — |
| EEPROM Size | 4 KB | 2 KB |
| Maximum Clock Speed | 8 MHz | — |
| Supply Voltage Range | 2.7 V to 5.5 V | 2.7 V to 5.5 V (L version) |
| I/O Count | 53 programmable I/O lines | — |
| ADC | 8-channel, 10-bit | — |
| JTAG Interface | Yes (on-chip debug and boundary-scan) | — |
| Timers | 2 x 8-bit, 2 x 16-bit with PWM | Two 8-bit, Two 16-bit |
| Communication Interfaces | 2 x USART, SPI, 2-wire (I2C-compatible) | — |
| Instruction Set | 133 instructions, most single-cycle | — |
| Gehäuse | 64-QFN (9x9 mm) | 64-QFN (9x9 mm) MLF |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | -40C to +85C |
| Lebenszyklusstatus | Active | — |
| Series | AVR ATmega | — |
| Core Processor | — | AVR |
| Core Size | — | 8-Bit |
| Speed | — | 8 MHz |
| RAM Size | — | 4 KB SRAM |
| Number of I/O | — | 53 |
| Peripherals | — | Brown-out Detect/Reset, POR, PWM, WDT |
| Connectivity | — | I2C (TWI), SPI, UART/USART x2 |
| Data Converters | — | 8-channel 10-bit ADC |
| Oscillator Type | — | External (XTAL) |
| Program Memory Type | — | In-System Programmable FLASH |
| JTAG | — | Yes (on-chip debug and boundary scan) |
| Architecture | — | Advanced RISC, 130 instructions, 32 x 8 registers |