ATMEGA128L-8MNR vs ATMEGA128L-8MUR Vergleich
Detaillierter Direktvergleich von ATMEGA128L-8MNR von Microchip Technology und ATMEGA128L-8MUR von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
ATMEGA128L-8MNR - 8-bit AVR MCU 128KB Flash 64-QFN | Microchip
ATMEGA128L-8MNR ✓ AktivMicrochip Technology
ATMEGA128L-8MUR - 8-bit AVR MCU 128KB 8MHz 64-QFN | Microchip
ATMEGA128L-8MUR ✓ AktivSpezifikationsvergleich
| Parameter | ATMEGA128L-8MNR | ATMEGA128L-8MUR |
|---|---|---|
| Marke | Microchip Technology | Microchip Technology |
| Kategorie | Microcontrollers | Microcontrollers |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $4,55 | $11,75 |
| Core Architecture | 8-bit AVR RISC | — |
| Clock Speed | 8 MHz | — |
| Flash Program Memory | 128 KB (64K x 16) | — |
| SRAM | 4 KB | 4KB |
| EEPROM | 4 KB | 4KB |
| Versorgungsspannung | 2.7 V to 5.5 V | — |
| Datenbusbreite | 8 bit | — |
| I/O Ports | 53 I/O lines | — |
| ADC | 8-channel, 10-bit | — |
| Interface Types | JTAG, SPI, TWI (I2C), USART x2 | — |
| Instructions | 133 instructions, most single-cycle | — |
| Gehäuse | 64-QFN (9x9 mm), VFQFN with exposed pad | 64-VFQFN Exposed Pad (MLF), 9x9 mm |
| Montageart | Surface Mount | Surface Mount |
| Number of Terminals | 64 | — |
| Programming Method | ISP (In-System), IAP (In-Application), JTAG | — |
| On-Chip Debug | JTAG on-chip debugging | — |
| Lifecycle Stage | ACTIVE | ACTIVE |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Core Processor | — | AVR 8-bit RISC |
| Core Size | — | 8-Bit |
| Speed (Max Clock) | — | 8 MHz |
| Flash Memory | — | 128KB (64K x 16) In-System Programmable |
| Supply Voltage Range | — | 2.7 V to 5.5 V |
| Number of I/O | — | 53 |
| ADC Resolution | — | 10-bit, 8 channels |
| Timers | — | Two 8-bit, Two 16-bit |
| Communication Interfaces | — | 2x USART, SPI, TWI (I2C) |
| Debug Interface | — | JTAG (on-chip debug, boundary scan) |
| Betriebstemperatur | — | [DATA_NEEDED: operating temperature range] |
| Programmability | — | In-System Programmable (ISP), boot loader self-programming |