ATMEGA64A-AN vs ATMEGA128A-AU Vergleich

Detaillierter Direktvergleich von ATMEGA64A-AN von Microchip Technology und ATMEGA128A-AU von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Microchip Technology
ATMEGA64A-AN ATMEGA64A-AN - 8-bit AVR MCU, 64KB Flash, 16MHz | Microchip

ATMEGA64A-AN - 8-bit AVR MCU, 64KB Flash, 16MHz | Microchip

ATMEGA64A-AN ✓ Aktiv
Microchip Technology
ATMEGA128A-AU ATMEGA128A-AU - 8-bit AVR MCU 128KB Flash 16MHz TQFP-64 | Microchip

ATMEGA128A-AU - 8-bit AVR MCU 128KB Flash 16MHz TQFP-64 | Microchip

ATMEGA128A-AU ✓ Aktiv

Spezifikationsvergleich

Parameter ATMEGA64A-AN ATMEGA128A-AU
Marke Microchip Technology Microchip Technology
Kategorie Microcontrollers Microcontrollers
Lebenszyklusstatus Aktiv Aktiv
Lagerstatus In Stock In Stock
Stückpreis (USD) $7,02 $4,30
Core AVR 8-bit RISC —
Core Size 8-bit 8-Bit
Maximale Taktfrequenz 16 MHz —
Program Memory Size 64 KB (32K x 16) Flash —
EEPROM Size 2 KB —
SRAM Size 4 KB —
Number of I/Os 53 —
Working Registers 32 general purpose 32 general purpose
Timers/Counters 4 flexible timer/counters with compare modes and PWM 4 flexible timer/counters with compare modes and PWM
USART 2 —
Serial Interfaces 2x USART, TWI (I2C-compatible), SPI —
ADC 8-channel, 10-bit 8-channel, 10-bit
Real-Time Counter Yes Yes (RTC)
Program Memory Type ISP FLASH with read-while-write —
Betriebstemperatur -40C to +105C [DATA_NEEDED: operating temperature range]
Supply Voltage Range [DATA_NEEDED: supply voltage range] 2.7 V to 5.5 V
Gehäuse 64-TQFP (14x14 mm) 64-TQFP (14x14 mm)
Montageart Surface Mount Surface Mount
RoHS-Status Compliant (Green per FindIC listing) —
Programming Method In-System Programming (ISP) —
Core Processor — AVR
Architecture — Enhanced RISC, 133 instructions
Max Clock Frequency — 16 MHz
Flash Memory — 128 KB (64K x 16), In-System Programmable, read-while-write
EEPROM — 4 KB
SRAM — 4 KB
General Purpose I/O — 53 lines
Communication Interfaces — 2x USART, TWI (I2C), SPI
Debug / Boundary Scan — JTAG (IEEE 1149.1)
Projected End of Life — 2048-10-03 (per distributor lifecycle data)

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