ATSAM3S4AA-MU vs ATSAM3S8BA-MU Vergleich
Detaillierter Direktvergleich von ATSAM3S4AA-MU von Microchip Technology und ATSAM3S8BA-MU von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
ATSAM3S4AA-MU - 64MHz Cortex-M3 256KB Flash MCU | Microchip
ATSAM3S4AA-MU ✓ AktivMicrochip Technology
ATSAM3S8BA-MU - 64MHz Cortex-M3, 512KB Flash MCU | Microchip
ATSAM3S8BA-MU ✓ AktivSpezifikationsvergleich
| Parameter | ATSAM3S4AA-MU | ATSAM3S8BA-MU |
|---|---|---|
| Marke | Microchip Technology | Microchip Technology |
| Kategorie | Microcontrollers | Microcontrollers |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $3,85 | $5,72 |
| Core Processor | ARM Cortex-M3 revision 2.0 | — |
| Core Size | 32-bit single-core | — |
| Maximale Taktfrequenz | 64 MHz | — |
| Flash Memory | 256 KB (256K x 8) | 512 KB (512K x 8) |
| SRAM | 48 KB | [DATA_NEEDED: SRAM size] |
| Versorgungsspannung | 1.62 V to 3.6 V | 1.8 V / 2.5 V / 3.3 V |
| Instruction Set | Thumb-2 | — |
| Memory Protection Unit | Yes (MPU) | — |
| Flash Access Width | 128-bit with memory accelerator | — |
| USB | USB 2.0 device | USB 2.0 Full-Speed Device |
| Gehäuse | 48-QFN (7x7 mm) with exposed pad | 64-QFN (9x9 mm) Exposed Pad |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | — |
| ADC Resolution | [DATA_NEEDED: ADC resolution and channels] | 12-bit and 10-bit |
| Communication Interfaces | USART, SPI, TWI (I2C), USB | — |
| Debug Interface | SWD (Serial Wire Debug) | — |
| Legacy Compatibility | Pin-to-pin compatible with AT91SAM7S (48/64-pin) | — |
| Packaging | Tray | — |
| Core | — | ARM Cortex-M3, 32-bit |
| Core Clock Speed | — | 64 MHz |
| Core Supply Voltage Range | — | 1.08 V to 1.32 V |
| I/O Count | — | 47 |
| Series | — | SAM3S8 |
| Interface Peripherals | — | USART, SPI, TWI (I2C) |
| Life Cycle Stage | — | Active |
| Pin-Anzahl | — | 64 |
| Core Architecture | — | RISC, Harvard, 3-stage pipeline |
| Pin Compatibility | — | Pin-to-pin compatible with SAM7S series |