ATSAMD20J15A-AN vs ATSAMD20J18A-MU Vergleich
Detaillierter Direktvergleich von ATSAMD20J15A-AN von Microchip Technology und ATSAMD20J18A-MU von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
ATSAMD20J15A-AN - 32KB Flash Cortex-M0+ MCU 48MHz | Microchip
ATSAMD20J15A-AN ✓ AktivMicrochip Technology
ATSAMD20J18A-MU - SAM D20 Cortex-M0+ MCU, 256KB Flash | Microchip
ATSAMD20J18A-MU ✓ AktivSpezifikationsvergleich
| Parameter | ATSAMD20J15A-AN | ATSAMD20J18A-MU |
|---|---|---|
| Marke | Microchip Technology | Microchip Technology |
| Kategorie | Microcontrollers | Microcontrollers |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $2,15 | $2,69 |
| Core Processor | ARM Cortex-M0+ | — |
| Core Size | 32-bit | — |
| Maximum CPU Clock | 48 MHz | — |
| CoreMark / MHz | 2.14 | — |
| Program Memory (Flash) | 32 KB (32K x 8) | — |
| SRAM | 4 KB | 32 KB |
| Supply Voltage (VDD) | 1.62 V to 3.63 V | — |
| Betriebstemperatur | -40 C to +105 C | -40 C to +85 C (industrial) |
| Number of I/O | 52 | — |
| Connectivity | I2C, SPI, UART/USART | — |
| Peripherals | Brown-out Detect/Reset, POR, WDT, Peripheral Event System | — |
| Gehäuse | 64-TQFP (10x10 mm) with exposed pad | 64-pin QFN (9x9 mm) with exposed pad |
| Montageart | Surface Mount | Surface Mount |
| Series | SAM D20J | — |
| MSL-Level | 3 (168 hours) | — |
| Peak Reflow Temperature | 260 C | — |
| RoHS-Status | Compliant | Compliant |
| Core | — | ARM Cortex-M0+ (32-bit) |
| Maximum CPU Frequency | — | 48 MHz |
| CoreMark/MHz | — | 2.14 |
| Program Flash Memory | — | 256 KB |
| Supply Voltage (Vcc/Vdd) | — | 1.62 V to 3.6 V |
| ADC | — | 12-bit, up to 350 ksps |
| DAC | — | 10-bit |
| Peripheral Touch Controller (PTC) | — | 256 channels |
| Serial Communication (SERCOM) | — | Up to 6 (configurable as USART/I2C/SPI) |
| I/O Pins | — | [DATA_NEEDED: I/O pin count for 64-QFN variant] |
| RTC | — | 32-bit with calendar |