ATSAME70Q20B-CFN vs ATSAME70Q21B-CFN Vergleich
Detaillierter Direktvergleich von ATSAME70Q20B-CFN von Microchip Technology und ATSAME70Q21B-CFN von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
ATSAME70Q20B-CFN - ARM Cortex-M7 MCU 300MHz 1MB Flash | Microchip
ATSAME70Q20B-CFN ✓ AktivMicrochip Technology
ATSAME70Q21B-CFN - ARM Cortex-M7 MCU 300MHz 2MB Flash 144-UFBGA | Microchip
ATSAME70Q21B-CFN ✓ AktivSpezifikationsvergleich
| Parameter | ATSAME70Q20B-CFN | ATSAME70Q21B-CFN |
|---|---|---|
| Marke | Microchip Technology | Microchip Technology |
| Kategorie | Microcontrollers | Microcontrollers |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $8,47 | $19,95 |
| Core | ARM Cortex-M7 with FPU (single + double precision) | ARM Cortex-M7 with FPU (single + double precision) |
| Maximum CPU Clock | 300 MHz | — |
| Flash Memory | 1 MB (1024 KB) dual-bank with ECC | 2 MB (dual-bank) |
| SRAM | 384 KB multi-port SRAM | 384 KB |
| L1 Cache | 16 KB I-cache + 16 KB D-cache | — |
| Gehäuse | 144-ball UFBGA (6x6 mm, 0.5 mm pitch) | 144-UFBGA (6x6 mm) |
| GPIO Count | [DATA_NEEDED: max GPIO count for this die] | — |
| USB | 1x USB 2.0 High-Speed with on-chip PHY + 1x FS USB | USB 2.0 High-Speed with on-chip PHY (Device/Host/OTG) |
| CAN | 2x CAN-FD controllers | 2x CAN-FD |
| Ethernet | 10/100 Mbit MAC with IEEE 1588 hardware support (GMII/MII) | 10/100 MAC with 1588 PTP hardware assist |
| ADC | 12-bit, up to 2 MSPS | 12-bit, up to 2 Msps, up to 24 channels [DATA_NEEDED: exact channel count] |
| Versorgungsspannung | [DATA_NEEDED: VDDIO / VDDCORE range] | 3.3 V (single supply) [DATA_NEEDED: min/max range] |
| Betriebstemperatur | -40C to +85C (industrial) | [DATA_NEEDED: industrial/automotive grade] |
| Montageart | Surface Mount (UFBGA) | — |
| RoHS-Status | Compliant | Compliant [DATA_NEEDED: source authority] |
| Maximum Core Clock | — | 300 MHz |
| Crypto Accelerator | — | AES, TRNG, SHA |
| External Bus Interface | — | 16-bit HSIF (up to 133 MHz) for SRAM/FPGA |
| DMA | — | 16-channel Peripheral DMA + Event System |
| DSP Extensions | — | Single-precision MAC, SIMD instructions |