EP1AGX35DF780C5N vs EP1AGX35DF780 Vergleich
Detaillierter Direktvergleich von EP1AGX35DF780C5N von Altera und EP1AGX35DF780 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP1AGX35DF780C5N - Arria GX FPGA, 35K LE, 780-BGA | Altera
EP1AGX35DF780C5N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP1AGX35DF780C5N | EP1AGX35DF780 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $198,00 | $142,60 |
| Family | Arria GX | Altera Arria GX (90 nm) |
| Series | Arria GX FPGA | Arria GX |
| Logic Elements (LE) | 33,520 | 33,520 |
| Embedded Memory Bits | 1,348,416 | — |
| Dedicated 18x18 Multipliers | 341 | — |
| Embedded Memory Blocks | M512 / M4K / M-RAM | — |
| DSP Blocks | Yes (each block = 4 multipliers + adder/accumulator) | — |
| Multi-Gigabit Transceivers | Up to 8 channels, 600 Mbps to 3.125 Gbps | — |
| On-chip PLLs | 8 (4 support DPA) | — |
| User I/O Pins | [DATA_NEEDED: exact user I/O count for 780-BGA variant] | — |
| Process Technology | 90 nm SRAM-based | — |
| Gehäuse | 780-ball FineLine BGA (FBGA-780) | 780-ball FineLine BGA (FCBGA, 29x29 mm) |
| Speed Grade | C5 (commercial, speed grade 5) | — |
| Temperature Grade | -40C to +125C (industrial) | — |
| Supported Protocols | PCI Express Gen1, Gigabit Ethernet, Serial RapidIO, SDI/HD-SDI, XAUI | — |
| Hard IP | PCIe PIPE, GIGE MAC, DPA | — |
| Configuration Method | Passive serial, fast passive parallel, JTAG | — |
| RoHS-Status | Compliant | Compliant (lead-free variant) |
| Embedded Memory | — | 1,348,416 bits (1.34 Mbit) |
| Maximum User I/Os | — | 341 |
| Number of LABs / CLBs | — | 1676 LABs |
| Transceivers | — | Up to 8 channels, 3.125 Gbps per channel |
| PLLs | — | 4 |
| Embedded Multipliers | — | 18x18-bit hard multipliers (DSP blocks) |
| External Memory Support | — | DDR, DDR2, QDRII, QDRII+ |
| Configuration Methods | — | Passive Serial (PS), Fast Passive Parallel (FPP), JTAG 1149.1 |
| Betriebstemperaturbereich | — | -40C to +85C (industrial grade I-suffix variants available) |
| Process Node | — | 90 nm CMOS |
| Lifecycle | — | Mature / Obsolete in Intel FPGA product tree |
| Supply Voltage (Core) | — | [DATA_NEEDED: VCCINT nominal value] |