EP1AGX35DF780I5N vs EP1AGX35DF780 Vergleich
Detaillierter Direktvergleich von EP1AGX35DF780I5N von Intel und EP1AGX35DF780 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1AGX35DF780I5N | EP1AGX35DF780 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $225,00 | $142,60 |
| Family | Arria GX | Altera Arria GX (90 nm) |
| Logic Elements | 33,520 | — |
| Embedded Memory (Bits) | 1,348,416 | — |
| Logic Array Blocks (LABs) | 1,676 | — |
| Maximum User I/O Pins | 341 | — |
| Transceiver Channels | 8 | — |
| Maximum Transceiver Data Rate | 3.125 Gbps | — |
| PLLs | 4 | 4 |
| Global Clocks | 16 | — |
| Gehäuse | 780-ball FineLine BGA (FBGA) | 780-ball FineLine BGA (FCBGA, 29x29 mm) |
| Process Technology | 90 nm | — |
| Speed Grade | I5 (industrial) | — |
| Betriebs-Sperrschichttemperatur | -40 C to +100 C (industrial) | — |
| Configuration Method | Passive Serial / FPP / JTAG | — |
| Bitstream Encryption | AES-128 supported | — |
| Memory Interface Hard IP | DDR2, QDRII, RLDRAM II | — |
| DSP Blocks (18x18 multipliers) | Max 252 | — |
| RoHS-Status | Compliant | Compliant (lead-free variant) |
| Series | — | Arria GX |
| Logic Elements (LE) | — | 33,520 |
| Embedded Memory | — | 1,348,416 bits (1.34 Mbit) |
| Maximum User I/Os | — | 341 |
| Number of LABs / CLBs | — | 1676 LABs |
| Transceivers | — | Up to 8 channels, 3.125 Gbps per channel |
| Embedded Multipliers | — | 18x18-bit hard multipliers (DSP blocks) |
| External Memory Support | — | DDR, DDR2, QDRII, QDRII+ |
| Configuration Methods | — | Passive Serial (PS), Fast Passive Parallel (FPP), JTAG 1149.1 |
| Betriebstemperaturbereich | — | -40C to +85C (industrial grade I-suffix variants available) |
| Process Node | — | 90 nm CMOS |
| Lifecycle | — | Mature / Obsolete in Intel FPGA product tree |
| Supply Voltage (Core) | — | [DATA_NEEDED: VCCINT nominal value] |