EP1C3T100C8 vs EP1C3T100C8N Vergleich
Detaillierter Direktvergleich von EP1C3T100C8 von Intel und EP1C3T100C8N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1C3T100C8 | EP1C3T100C8N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Ende des Lebenszyklus | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,75 | $14,20 |
| Family | Cyclone I | Cyclone |
| Core Process | 0.13 µm SRAM | — |
| Core Voltage (VCCINT) | 1.5 V | — |
| Logic Elements | 2,910 LEs | 2,910 |
| Total RAM Bits | 59,904 bits | 59,904 |
| M4K RAM Blocks | 13 (4 Kbit each) | — |
| Embedded Multipliers | Not present on EP1C3 | — |
| PLLs | 1 general-purpose PLL | 1 |
| Global Clock Networks | 8 | — |
| User I/O Pins | 65 | — |
| Gehäuse | TQFP-100 (14x14 mm) | TQFP-100 (100-pin Thin Quad Flat Pack), 16 x 16 mm, 0.5 mm pitch |
| Speed Grade | -8 (commercial) | — |
| Betriebstemperatur | 0C to +85C (commercial) | 0C to +85C (Commercial) |
| Montageart | Surface Mount | Surface Mount |
| Configuration Modes | AS, PS, JTAG | — |
| I/O Standards | LVTTL, LVCMOS, SSTL-2/3, LVDS, RSDS | — |
| RoHS-Status | Compliant | Compliant (lead-free, 'N' suffix) |
| Lifecycle | EOL per PDN1810 (since 2019) | — |
| Logic Array Blocks (LABs) | — | 291 |
| Embedded RAM Blocks | — | 13 x M4K (4 Kbit each) |
| Maximum User I/Os | — | 65 |
| Operating Frequency (max) | — | 275 MHz |
| Core Voltage | — | 1.425 V to 1.575 V |
| Process Technology | — | 130 nm CMOS |
| Configuration Interface | — | Passive Serial (PS), Fast Passive Parallel (FPP), JTAG |
| MSL-Level | — | 3 (168 hours) |