EP1C6T144I6ES vs EP1C6T144C7N Vergleich
Detaillierter Direktvergleich von EP1C6T144I6ES von Intel und EP1C6T144C7N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1C6T144I6ES | EP1C6T144C7N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $17,95 | $18,40 |
| Family | Cyclone | Cyclone |
| Logic Elements (LEs) | 5,980 | — |
| Logic Array Blocks (LABs) | 598 (10 LEs per LAB) | — |
| Maximum Internal Frequency | 405 MHz | — |
| Total RAM Bits | 92,160 (approx 92 Kbits) | 92160 |
| Embedded Multipliers | 0 (not supported in this generation) | — |
| PLLs | 2 | — |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O for TQFP-144 variant] | — |
| Gehäuse | TQFP-144 (22 x 22 mm, 0.5 mm pitch, gull-wing, lead-free) | 144-TQFP (TQFP-144) |
| Package Code (JEDEC) | LFQFP | — |
| Maximum Seated Height | 1.6 mm | — |
| Core Voltage | 1.5 V (typ) | — |
| Betriebstemperaturbereich | -40C to +100C (industrial, 'I' suffix) | — |
| Speed Grade | I6 (industrial, slowest grade) | — |
| Configuration Interface | JTAG, Passive Serial (PS), EPC configuration devices | — |
| Process Node | 0.13 um SRAM | — |
| Lead-Free / RoHS | Yes (lead-free, RoHS compliant per Verified Web Data) | — |
| Supported I/O Standards | LVTTL, LVCMOS, LVDS, SSTL-2, SSTL-3 | — |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | [DATA_NEEDED: MSL rating not in Verified Web Data] | — |
| Series | — | Cyclone I |
| Manufacturer | — | Altera (Intel) |
| Logic Elements | — | 5980 |
| Logic Cells / CLBs | — | 5980 |
| Number of I/Os | — | 98 |
| Number of LABs/CLBs | — | 598 |
| Operating Voltage (Core) | — | 1.5 V |
| Operating Voltage (I/O) | — | 3.3 V (LVCMOS/LVTTL) |
| Maximum Operating Frequency | — | 320 MHz |
| Process Technology | — | CMOS, 130 nm |
| Number of PLLs | — | 2 |
| Package Size | — | 22 x 22 mm |
| Lead Pitch | — | 0.5 mm |
| Betriebstemperatur | — | 0C to +85C (commercial) |
| Configuration Modes | — | PS, AS, JTAG |
| RoHS-Status | — | Compliant |