EP1K100FC484-2 vs EP1K100FC484-2N Vergleich
Detaillierter Direktvergleich von EP1K100FC484-2 von Altera und EP1K100FC484-2N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP1K100FC484-2N - 100K Gates ACEX-1K FPGA 333 I/O 484-FBGA | Intel
EP1K100FC484-2N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP1K100FC484-2 | EP1K100FC484-2N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $33,40 | $58,40 |
| Series | ACEX-1K | — |
| Family | ACEX 1K | ACEX-1K |
| Logic Elements / Cells | 4992 | — |
| Total RAM Bits | 49152 | — |
| Number of LABs/CLBs | 624 | — |
| Number of User I/O | 333 | — |
| System Gates (typical) | 100000 | — |
| Number of Gates | 257000 | — |
| Operating Supply Voltage (Core) | 2.5 V (2.375 V to 2.625 V) | — |
| I/O Supply Voltage | 1.8 V / 2.5 V / 3.3 V (multi-volt I/O) | — |
| Maximum Internal Clock Frequency | 250 MHz | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm SRAM |
| Betriebstemperaturbereich | 0 °C to 70 °C (Commercial, TA) | — |
| Gehäuse | 484-BBGA (FineLine BGA, 1.0 mm pitch) | 484-ball FBGA |
| Montageart | Surface Mount (SMD) | Surface Mount |
| Embedded Memory Type | Dual-port RAM / ROM (EABs) | — |
| Lebenszyklusstatus | Obsolete (EOL) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: non-leaded vs leaded suffix; -2N suffix indicates non-leaded per Altera naming] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Logic Elements | — | 4,992 |
| Typical Gates | — | 100,000 |
| Embedded Memory (EAB) | — | 49,152 bits |
| Maximum User I/O | — | 333 |
| Core Voltage | — | 2.5 V |
| Speed Grade | — | -2 (commercial) |
| Betriebstemperatur | — | [DATA_NEEDED: operating temperature range] |
| Configuration Method | — | SRAM, JTAG (IEEE 1149.1) |
| Programmable I/O Standards | — | LVTTL, LVCMOS, PCI, SSTL-2/3, GTL+ |
| Lead Status | — | Contains lead (legacy non-Pb-free suffix -2N) |