EP1K100FI256-2N vs EP1K50FI256-2N Vergleich

Detaillierter Direktvergleich von EP1K100FI256-2N von Intel und EP1K50FI256-2N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP1K100FI256-2N EP1K50FI256-2N
Marke Intel Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $55,80 $23,90
Family ACEX 1K —
Series EP1K100 ACEX-1K
Logic Elements 4,992 2,880
System Gates 100,000 —
Logic Array Blocks (LABs) 624 —
Embedded Array Blocks (EABs) 6 —
Total RAM Bits 49,152 40,960
Maximum User I/O 186 —
Process Technology 0.22 µm CMOS 0.22 µm CMOS, SRAM-based
Core Supply Voltage 2.5 V —
I/O Supply Voltage 2.5 V / 3.3 V / 5.0 V (MultiVolt) —
Speed Grade -2 (faster bin) —
Ball Finish Leaded (SnPb) - 'N' suffix —
Betriebstemperatur -40 °C to +85 °C (Industrial) [DATA_NEEDED: operating temperature range]
Gehäuse 256-ball FineLine BGA (FBGA-256) 256-ball FineLine BGA (FBGA), 17 x 17 mm, 1.8 mm height
Montageart Surface Mount Surface Mount
Configuration Interface JTAG (IEEE 1149.1) + serial modes —
RoHS-Status Non-compliant (leaded 'N' ball finish) [DATA_NEEDED: RoHS compliance status]
Manufacturer — Intel (formerly Altera)
Number of LABs/CLBs — 360
Number of Gates — 50,000 (typical); 199,000 (maximum)
Number of I/O Pins — 186 (maximum)
Core Voltage — 2.5 V (2.375 V to 2.625 V)
Operating Frequency (max) — 200 MHz (internal)
Configuration Method — SRAM - serial/parallel, JTAG (IEEE 1149.1), EPC configuration PROM
Lead-Free / Halogen-Free — [DATA_NEEDED: lead-free / halogen-free status]

Datenblätter & Ressourcen

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