EP1K100QI208-2 vs EP1K100QI208-2N Vergleich

Detaillierter Direktvergleich von EP1K100QI208-2 von Altera und EP1K100QI208-2N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP1K100QI208-2 EP1K100QI208-2N
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $23,90 $0,00
Family ACEX-1K —
Logic Elements 4,992 cells —
System Gates 100,000 257000
Logic Array Blocks (LABs) 624 —
Embedded Memory (EAB) 49,152 bits —
User I/Os 147 —
Maximum Operating Frequency 250 MHz —
Core Voltage (VCCINT) 2.5 V —
Process Technology 0.22 umm CMOS SRAM —
Gehäuse 208-pin PQFP (BFQFP) —
Pitch 0.5 mm —
Montageart Surface Mount Surface Mount
Betriebstemperatur -40C to +85C (Industrial) —
Configuration Interface JTAG (IEEE 1149.1) / serial / EPC2 —
Global Clock Networks 4 —
I/O Standards Supported LVTTL, LVCMOS, PCI, 5V tolerant —
RoHS-Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: manufacturer RoHS certificate]
Series — ACEX-1K
FPGA Family — ACEX-1K
Number of Logic Elements/Cells — 4992
Number of LABs/CLBs — 624
Total RAM Bits — 49152
Number of User I/O — 147
Gehäuse / Bauform — 208-BFQFP
Core Supply Voltage — 2.5 V
Speed Grade — -2
Temperature Grade — I (industrial)
Typical Gate Count — 100K gates (family)
Betriebstemperaturbereich — [DATA_NEEDED: exact industrial temperature limits from ACEX-1K datasheet]
Max User I/O in 208-BFQFP — 147
Total Number of Configuration Bits — [DATA_NEEDED: configuration bitstream size]
Maximum Internal Clock Frequency — [DATA_NEEDED: clock frequency for -2 speed grade]
I/O Standard Support — [DATA_NEEDED: supported I/O standards]
PLL/Clock Management — [DATA_NEEDED: PLL availability on EP1K100]

Datenblätter & Ressourcen

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