EP1K10QC208-1N vs EP1K10QC208-2N Vergleich
Detaillierter Direktvergleich von EP1K10QC208-1N von Altera und EP1K10QC208-2N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP1K10QC208-2N - ACEX-1K 10K Gates FPGA | Intel / Altera
EP1K10QC208-2N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP1K10QC208-1N | EP1K10QC208-2N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $7,95 |
| Product Family | ACEX-1K | — |
| Device Category | FPGA (Field Programmable Gate Array) | — |
| Typical Gates | 10,000 | 10,000 |
| Logic Elements / Cells | 576 | — |
| LABs / CLBs | 72 | — |
| Number of User I/O | 120 | — |
| Total RAM Bits | 12,288 bits | 12,288 |
| Core Supply Voltage | 2.5 V | — |
| Process Technology | 0.22 um CMOS | 0.22 µm CMOS |
| Speed Grade | -1 | — |
| Maximum Internal Frequency | 250 MHz (listed for -1 speed grade) | — |
| Gehäuse / Bauform | 208-BFQFP (PQFP-208) | — |
| Number of Terminals | 208 | — |
| Terminal Form | Gull wing | — |
| Package Shape | Square | — |
| Montageart | Surface Mount | Surface Mount |
| Temperature Grade | Commercial | — |
| Lead-Free Package (N Suffix) | Yes | — |
| Betriebstemperaturbereich | [DATA_NEEDED: exact commercial operating temperature range in datasheet] | — |
| RoHS-Status | [DATA_NEEDED: RoHS certificate/status] | Compliant |
| MSL-Level | [DATA_NEEDED: moisture sensitivity level] | — |
| Family | — | ACEX-1K |
| Logic Elements | — | 576 |
| Logic Array Blocks (LABs) | — | 72 |
| Embedded Array Blocks (EABs) | — | 12 |
| User I/O Pins | — | 120 |
| Core Voltage | — | 2.5 V (2.375 V to 2.625 V) |
| Gehäuse | — | 208-BFQFP (PQFP, 28x28 mm) |
| Betriebstemperatur | — | 0 °C to +70 °C (commercial) |
| Configuration Mode | — | Serial (AS) / Passive Serial (PS) |
| JTAG Support | — | IEEE 1149.1 Boundary Scan |