EP1K10TC144-1 vs EP1K10TC1443N Vergleich
Detaillierter Direktvergleich von EP1K10TC144-1 von Altera und EP1K10TC1443N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1K10TC144-1 | EP1K10TC1443N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $22,95 |
| Family | ACEX-1K | ACEX 1K |
| Logic Elements | 576 | 576 |
| Typical Gates | 10,000 | 10,000 |
| Logic Array Blocks (LABs) | 72 | 72 |
| Embedded Array Blocks (EABs) | 3 | — |
| Total RAM Bits | 12,288 | — |
| Maximum User I/Os | 92 | — |
| Core Voltage | 2.5 V | 2.5 V |
| I/O Voltage | 3.3 V (5 V tolerant) | — |
| Process Technology | 0.22 µm | 2.5 V CMOS |
| Operating Frequency (max) | 250 MHz | — |
| Gehäuse | 144-LQFP (TQFP, gull-wing) | TQFP-144 (TQ144) |
| Pin-Anzahl | 144 | — |
| Betriebstemperatur | 0 °C to +70 °C (Commercial) | Commercial (0C to +70C) - [DATA_NEEDED: full T range for -3N suffix] |
| Configuration Mode | Serial / JTAG (IEEE 1149.1) | — |
| RoHS-Status | Compliant | [DATA_NEEDED: lead-free/RoHS status] |
| Embedded Memory (EAB bits) | — | 12,288 |
| User I/Os | — | 92 |
| Maximum User I/O Pins | — | 144 |
| Montageart | — | Surface Mount |
| Speed Grade | — | -3 |
| Maximum Frequency | — | 80 MHz |
| Configuration Memory | — | SRAM-based |
| JTAG Boundary-Scan | — | IEEE Std. 1149.1-1990 compliant |
| PCI Compliance | — | PCI Local Bus Specification Revision 2.2 (5.0 V) |
| Embedded RAM Type | — | Dual-port |