EP1K30QC208-3N vs EP1K30QI208-3N Vergleich
Detaillierter Direktvergleich von EP1K30QC208-3N von Altera und EP1K30QI208-3N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP1K30QC208-3N - ACEX-1K FPGA, 30K Gates, 208-PQFP | Altera
EP1K30QC208-3N ⚠ Letzte BestellmöglichkeitAltera
EP1K30QI208-3N - 30K Gate ACEX 1K FPGA, 147 I/O, 208-PQFP | Intel (Altera)
EP1K30QI208-3N ObsoleteSpezifikationsvergleich
| Parameter | EP1K30QC208-3N | EP1K30QI208-3N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $15,90 | $18,10 |
| Family | ACEX-1K | ACEX-1K |
| Logic Elements | 1,728 | — |
| Typical Gates | 30,000 | — |
| Logic Array Blocks (LABs) | 172 | — |
| Embedded Array Blocks (EABs) | 6 (24 Kbits total) | — |
| Maximum User I/O | 147 | — |
| Gehäuse | 208-BQFP / 208-PQFP | 208-pin PQFP / FQFP (S-PQFP-G208), 0.5 mm pitch |
| Montageart | Surface Mount | Surface Mount (fine-pitch QFP) |
| Betriebstemperatur | Industrial (N suffix) | -40 C to +85 C (industrial) |
| Speed Grade | -3 (fastest) | -3 |
| Process Technology | 0.18 µm CMOS, SRAM-based LUT | — |
| Core Supply Voltage | 2.5 V | 2.375 V to 2.625 V (nominal 2.5 V) |
| I/O Supply Voltage (VCCIO) | 3.3 V (5 V tolerant I/O supported) | — |
| Configuration Interface | Serial / Parallel / JTAG (IEEE 1149.1) | — |
| RoHS-Status | Compliant (lead-free / Pb-free) | Compliant |
| Series | — | ACEX 1K |
| Logic Elements / Cells | — | 1728 |
| Total RAM Bits | — | 24576 |
| Number of I/O | — | 147 |
| Number of Dedicated Inputs | — | 6 |
| Number of Gates (typical) | — | 30000 |
| Number of Embedded Array Blocks | — | 6 |
| I/O Standards | — | LVTTL, LVCMOS (multi-voltage I/O) |
| Configuration Memory | — | Volatile SRAM (serial configuration required) |
| Programming Interface | — | JTAG (IEEE 1149.1) + serial configuration |