EP1K30TC144-1N vs EP1K50TC144-1N Vergleich
Detaillierter Direktvergleich von EP1K30TC144-1N von Altera und EP1K50TC144-1N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1K30TC144-1N | EP1K50TC144-1N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $11,50 | $9,85 |
| Series | ACEX-1K | — |
| Number of Logic Elements (LEs) | 1,728 | — |
| Typical Gates | 30,000 | — |
| Number of Logic Array Blocks (LABs) | 216 | — |
| Embedded Memory (EAB) | 24,576 bits (6 EABs) | — |
| Number of User I/O | 102 | — |
| Number of I/O Banks | 4 | — |
| Package Type | 144-LQFP (TQFP) | — |
| Montageart | Surface Mount | Surface Mount |
| Core Voltage | 2.5 V | — |
| I/O Voltage | 3.3 V (LVCMOS/LVTTL); 2.5 V tolerant | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Process Technology | 0.18 µm SRAM | CMOS |
| Configuration | SRAM-based, JTAG (IEEE 1149.1) + serial/parallel passive | — |
| PLLs | 6 (per device family) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| MSL-Level | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Family | — | ACEX 1K |
| Logic Elements | — | 2,880 |
| Logic Array Blocks (LABs) | — | 360 |
| Equivalent Gates | — | 199,000 |
| Embedded RAM | — | 40,960 bits |
| User I/Os | — | 102 |
| Maximum Operating Frequency | — | 180 MHz |
| Supply Voltage (Typical) | — | 2.5 V |
| Supply Voltage Range | — | 2.375 V to 2.625 V |
| Gehäuse | — | 144-pin TQFP |
| JTAG Boundary-Scan | — | IEEE Std 1149.1-1990 compliant |
| PCI Compliance | — | PCI Local Bus Specification Rev 2.2 (5.0V, -1 speed grade) |
| Speed Grade | — | -1 |