EP1K30TC144-2 vs EP1K30TC1443N Vergleich
Detaillierter Direktvergleich von EP1K30TC144-2 von Intel und EP1K30TC1443N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1K30TC144-2 | EP1K30TC1443N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $18,40 | $9,95 |
| Family | ACEX 1K | ACEX 1K |
| Logic Elements / Cells | 1,728 | — |
| System Gates | 30,000 | — |
| Logic Array Blocks (LABs) | 216 | — |
| User I/Os | 102 | — |
| Embedded Array Blocks (EABs) | 6 | — |
| Total EAB Memory | 24,576 bits | — |
| Process Technology | 0.22 µm SRAM LUT | 0.22 um CMOS |
| Core Supply Voltage (VCCINT) | 2.5 V (2.375 V - 2.625 V) | — |
| I/O Supply Voltage (VCCIO) | 3.3 V (LVTTL/LVCMOS), 2.5 V, or PCI | — |
| Maximum Internal Clock Frequency | 200 MHz | — |
| Gehäuse | 144-pin TQFP (TC) | TQFP-144 (20x20 mm) |
| Operating Temperature (Commercial) | 0C to +70C | — |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| Configuration Method | Passive Serial / JTAG / EPC1/EPC2 PROM | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Compliant (per legacy Altera product page) |
| Speed Grade | -2 (mid commercial speed grade) | -3 (slowest) |
| Logic Elements | — | 1,728 LEs |
| Typical Gates | — | 30,000 gates |
| Embedded Memory | — | 24 Kbit SRAM (EAB) |
| Maximum User I/O | — | 102 |
| Supply Voltage (Core) | — | 2.5 V |
| Betriebstemperatur | — | 0C to +70C (commercial) |
| I/O Standards | — | LVTTL, LVCMOS (2.5V/3.3V/5V tolerant) |
| Configuration | — | JTAG (IEEE 1149.1), passive serial |
| Toolchain | — | Quartus II 13.0 or earlier |