EP1K30TC144-3 vs EP1K30TC1443N Vergleich
Detaillierter Direktvergleich von EP1K30TC144-3 von Intel und EP1K30TC1443N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1K30TC144-3 | EP1K30TC1443N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $10,80 | $9,95 |
| Series | ACEX-1K | — |
| Logic Elements / Cells | 1,728 | — |
| Total RAM Bits | 24,576 | — |
| Number of LABs/CLBs | 216 | — |
| Typical Gates | 30,000 | 30,000 gates |
| Maximum System Gates | 56,000 | — |
| Number of User I/O | 102 | — |
| Number of Logic Array Blocks | 216 | — |
| Supply Voltage (Core) | 2.5 V | 2.5 V |
| I/O Voltage Standard | 2.5 V LVCMOS / LVTTL (MultiVolt up to 5.0 V tolerant) | — |
| Process Technology | 0.22 µm SRAM | 0.22 um CMOS |
| Operating Temperature (Commercial) | 0C to +70C | — |
| Gehäuse | 144-LQFP / 144-TQFP (22x22 mm, 0.5 mm pitch) | TQFP-144 (20x20 mm) |
| Montageart | Surface Mount | Surface Mount |
| Speed Grade | -3 (slowest speed bin) | -3 (slowest) |
| Configuration Method | Serial configuration device (EPC2/EPC8 compatible) | — |
| Boundary Scan | IEEE 1149.1 JTAG compliant | — |
| Number of Global Clocks | 8 | — |
| RoHS-Status | [DATA_NEEDED: rohs status from datasheet] | Compliant (per legacy Altera product page) |
| Family | — | ACEX 1K |
| Logic Elements | — | 1,728 LEs |
| Embedded Memory | — | 24 Kbit SRAM (EAB) |
| Maximum User I/O | — | 102 |
| Betriebstemperatur | — | 0C to +70C (commercial) |
| I/O Standards | — | LVTTL, LVCMOS (2.5V/3.3V/5V tolerant) |
| Configuration | — | JTAG (IEEE 1149.1), passive serial |
| Toolchain | — | Quartus II 13.0 or earlier |