EP1K50F256-2N vs EP1K50FC256-2N Vergleich
Detaillierter Direktvergleich von EP1K50F256-2N von Altera und EP1K50FC256-2N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1K50F256-2N | EP1K50FC256-2N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $21,80 | $17,95 |
| Family | ACEX 1K | ACEX-1K |
| Logic Elements | 2,880 | — |
| Typical Gates | 50,000 | 50,000 |
| Total RAM Bits | 40,960 | — |
| Logic Array Blocks (LABs) | 360 | 360 |
| Embedded Array Blocks (EABs) | 5 | 10 |
| Maximum User I/O | 186 | — |
| Gehäuse | 256-ball FineLine BGA (F256), 1.0 mm pitch | 256-ball FBGA (FineLine BGA) |
| Speed Grade | -2 | -2 |
| Betriebstemperatur | 0C to +70C (commercial) | 0 °C to 70 °C (Commercial) |
| Core Voltage | 3.3 V | — |
| I/O Standards | LVTTL, LVCMOS, 3.3 V / 2.5 V / 1.8 V / 1.5 V | — |
| Configuration Method | SRAM, serial or parallel via Altera EPC devices | JTAG / Passive Serial |
| Process Technology | 0.22 µm SRAM | 0.22 µm CMOS SRAM |
| Programming Interface | JTAG (IEEE 1149.1) / in-system programmable | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Logic Elements (LEs) | — | 2,880 |
| Embedded Memory (bits) | — | 40,960 |
| Maximum User I/O Pins | — | 186 |
| Core Voltage (VCCINT) | — | 2.5 V (2.375 V to 2.625 V) |
| Package Dimensions | — | 16 x 16 mm |
| Montageart | — | Surface Mount (BGA) |